MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 54

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

Configuration Register (CONFIG)
IRQPUD — IRQ Pin Pullup Control Bit
IRQEN — IRQ Pin Function Selection Bit
OSCOPT1 and OSCOPT0 — Selection Bits for Oscillator Option
RSTEN — RST Pin Function Selection
COPRS (Out of STOP Mode) — COP Reset Period Selection Bit
COPRS (In STOP Mode) — Auto Wakeup Period Selection Bit
LVISTOP — LVI Enable in Stop Mode Bit
LVIRSTD — LVI Reset Disable Bit
54
(0, 0) Internal oscillator
(0, 1) External oscillator
(1, 0) External RC oscillator
(1, 1) External XTAL oscillator
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
LVIRSTD disables the reset signal from the LVI module.
1 = Internal pullup is disconnected
0 = Internal pullup is connected between IRQ pin and V
1 = Interrupt request function active in pin
0 = Interrupt request function inactive in pin
1 = Reset function active in pin
0 = Reset function inactive in pin
1 = COP reset short cycle = 8176 × BUSCLKX4
0 = COP reset long cycle = 262,128 × BUSCLKX4
1 = Auto wakeup short cycle = 512 × INTRCOSC
0 = Auto wakeup long cycle = 16,384 × INTRCOSC
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
Address: $001F
The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will
leave this bit unaffected.
Reset:
Read:
Write:
POR:
U = Unaffected
COPRS
Bit 7
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
LVISTOP
MC68HC908QY/QT Family Data Sheet, Rev. 6
6
0
0
LVIRSTD
5
0
0
LVIPWRD
NOTE
4
0
0
LVI5OR3
U
3
0
DD
SSREC
2
0
0
STOP
1
0
0
Freescale Semiconductor
COPD
Bit 0
0
0