MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 35

MC68HC908QT2CPE

Manufacturer Part Number
MC68HC908QT2CPE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC68HC908QT2CPE

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
6
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
4-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
8
Package Type
PDIP
Program Memory Type
Flash
Program Memory Size
1.5KB
Lead Free Status / RoHS Status
Compliant
2.6.3 FLASH Mass Erase Operation
Use the following procedure to erase the entire FLASH memory to read as a 1:
2.6.4 FLASH Program Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the
following step-by-step procedure to program a row of FLASH memory
Figure 2-4
Freescale Semiconductor
10. After time, t
1. When in monitor mode, with security sequence failed (see
1. Set both the ERASE bit and the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read the FLASH block protect register.
3. Write any data to any FLASH location within the address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address being programmed
instead of any FLASH address.
address and data for programming.
shows a flowchart of the programming algorithm.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order as shown, but other unrelated operations
may occur between the steps.
A mass erase will erase the internal oscillator trim values at $FFC0 and
$FFC1.
Only bytes which are currently $FF may be programmed.
RCV
(typical 1 μs), the memory can be accessed in read mode again.
NVS
MErase
NVHL
NVS
PGS
(minimum 10 μs).
(minimum 10 μs).
(minimum 5 μs).
(minimum 100 μs).
(minimum 4 ms).
MC68HC908QY/QT Family Data Sheet, Rev. 6
(1)
CAUTION
within the FLASH memory address range.
NOTE
NOTE
NOTE
15.3.2
Security), write to the FLASH block protect register
(2)
.
FLASH Memory (FLASH)
35

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