MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 85
MC68HC908QT2CPE
Manufacturer Part Number
MC68HC908QT2CPE
Description
Manufacturer
Freescale
Datasheet
1.MC68HC908QT2CPE.pdf
(184 pages)
Specifications of MC68HC908QT2CPE
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
6
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
4-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
8
Package Type
PDIP
Program Memory Type
Flash
Program Memory Size
1.5KB
Lead Free Status / RoHS Status
Compliant
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Chapter 10
Low-Voltage Inhibit (LVI)
10.1 Introduction
This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the V
and can force a reset when the V
10.2 Features
Features of the LVI module include:
10.3 Functional Description
Figure 10-1
user selectable options found in the configuration register (CONFIG1). See
Register
The LVI is enabled out of reset. The LVI module contains a bandgap reference circuit and comparator.
Clearing the LVI power disable bit, LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset when V
Freescale Semiconductor
•
•
•
•
Programmable LVI reset
Programmable power consumption
Selectable LVI trip voltage
Programmable stop mode operation
(CONFIG).
shows the structure of the LVI module. LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are
FROM CONFIG
DETECTOR
LVI5OR3
LOW V
V
DD
DD
Figure 10-1. LVI Module Block Diagram
V
V
MC68HC908QY/QT Family Data Sheet, Rev. 6
DD
DD
DD
FROM CONFIG
> LVITRIP = 0
≤ LVITRIP = 1
voltage falls below the LVI trip falling voltage, V
LVIPWRD
LVIOUT
STOP INSTRUCTION
FROM CONFIG
LVIRSTD
FROM CONFIG
DD
Chapter 5 Configuration
LVI RESET
LVISTOP
voltage. Clearing the LVI
DD
falls below a voltage,
TRIPF
.
DD
pin
85
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