MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 107
MC68HC908QT2CPE
Manufacturer Part Number
MC68HC908QT2CPE
Description
Manufacturer
Freescale
Datasheet
1.MC68HC908QT2CPE.pdf
(184 pages)
Specifications of MC68HC908QT2CPE
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
6
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
4-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
8
Package Type
PDIP
Program Memory Type
Flash
Program Memory Size
1.5KB
Lead Free Status / RoHS Status
Compliant
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13.4.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module (POR) generates a pulse to indicate
that power on has occurred. The SIM counter counts out 4096 BUSCLKX4 cycles. Sixty-four BUSCLKX4
cycles later, the CPU and memories are released from reset to allow the reset vector sequence to occur.
At power on, the following events occur:
See
Freescale Semiconductor
•
•
•
•
•
ADDRESS BUS
Figure
BUSCLKX4
BUSCLKX2
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables the oscillator to drive BUSCLKX4.
Internal clocks to the CPU and modules are held inactive for 4096 BUSCLKX4 cycles to allow
stabilization of the oscillator.
The POR bit of the SIM reset status register (SRSR) is set
PORRST
OSC1
RST
13-6.
Reset Recovery Type
CYCLES
4096
Figure 13-5. Sources of Internal Reset
ILLEGAL ADDRESS RST
All others
MC68HC908QY/QT Family Data Sheet, Rev. 6
ILLEGAL OPCODE RST
POR/LVI
Table 13-2. Reset Recovery Timing
Figure 13-6. POR Recovery
CYCLES
32
COPRST
POR
LVI
CYCLES
32
Actual Number of Cycles
4163 (4096 + 64 + 3)
INTERNAL RESET
67 (64 + 3)
$FFFE
Reset and System Initialization
$FFFF
107
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