LM9830VJD/NOPB National Semiconductor, LM9830VJD/NOPB Datasheet - Page 5

IC SCANNER COLOR DOC 100-TQFP

LM9830VJD/NOPB

Manufacturer Part Number
LM9830VJD/NOPB
Description
IC SCANNER COLOR DOC 100-TQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM9830VJD/NOPB

Number Of Bits
12
Number Of Channels
3
Power (watts)
350mW
Voltage - Supply, Analog
5V
Voltage - Supply, Digital
4.5 V ~ 5.5 V
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM9830VJD
*LM9830VJD/NOPB
LM9830VJD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM9830VJD/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
AC Electrical Characteristics
The following specifications apply for AGND=DGND=DGND
f
C
t
t
t
t
CRYSTAL IN
NIB ACCESS1
NIB ACCESS2
t
RD TRI-STATE
EPP ACCESS
t
t
L
t
RD ACCESS
ALE SETUP
t
t
WR SETUP
EPP HOLD
ALE HOLD
Symbol
t
WR HOLD
ALE-R/W
(databus loading) = 20pF/pin. Boldface limits apply for T
t
t
t
t
t
t
AF-B3
B-AF2
AF-B4
AF-B3
B-AF2
AF-B4
t
t
ALE
WR
= 50MHz, MCLK DIVIDER = 1.0 (unless otherwise noted), f
AUTOFEED falling to BUSY rising
D0-D7 valid before BUSY rising
BUSY rising to AUTOFEED rising
AUTOFEED rising to D0-D7 Tri-State
AUTOFEED rising to BUSY falling
AUTOFEED falling to BUSY rising
D4-D7 valid before BUSY rising
BUSY rising to AUTOFEED rising
D0-D3 valid after AUTOFEED rising
AUTOFEED rising edge to BUSY
falling
D0-D7 (Address) valid before ALE
falling
D0-D7 (Address) valid after ALE
falling
ALE high time
ALE falling to CS/RD/WR falling (next
operation)
D0-D7 valid before WR rising
D0-D7 valid after WR rising
WR pulse width
RD low to D0-D7 valid
RD high to D0-D7 Tri-State
Parameter
Microprocessor Mode (Figures 5, 6, and 7)
Parallel Port 8 Bit Data Read (Figure 3)
Nibble Data Read (Figure 4)
All Except Dataport
Dataport
All Except Dataport
Dataport
(Note 14)
I/O
A
Conditions
=DGND
=T
5
J
=T
MIN
SRAM
MCLK
to T
=0V, V
= f
MAX
CRYSTAL IN
; all other limits T
A
1.5 t
1.5 t
=V
(Note 9)
Typical
3 t
3 t
D
=V
ADC CLK
ADC CLK
25
20
MCLK
25
MCLK
22
20
7
1
2
1
5
0
2
2
0
2
3
/MCLK DIVIDER, f
DI/O
=V
SRAM
A
=T
3 t
3 t
(Note 10)
J
4 t
4 t
Limits
=25°C. (Notes 7 & 8)
ADC CLK
ADC CLK
=+5.0V
-20
45
10
10
27
MCLK
45
10
15
MCLK
16
10
10
31
28
-5
6
8
8
6
ADC CLK
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DC
,
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
= f
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
Units
MCLK
/8,

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