MAX1359BETL+ Maxim Integrated Products, MAX1359BETL+ Datasheet - Page 60

IC DAS 16BIT 40-TQFN

MAX1359BETL+

Manufacturer Part Number
MAX1359BETL+
Description
IC DAS 16BIT 40-TQFN
Manufacturer
Maxim Integrated Products
Type
Data Acquisition System (DAS)r
Datasheets

Specifications of MAX1359BETL+

Resolution (bits)
16 b
Sampling Rate (per Second)
21.84k
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Number Of Converters
2
Resolution
16 bit
Interface Type
Serial (4-Wire, SPI, QSPI, Microwire)
Voltage Reference
1.25 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V
Maximum Power Dissipation
2051.3 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
1.8 V to 3.6 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 25 illustrates the MAX1359B in a complete optical
reflectometry application with two transmitting LEDs and
one receiving photodiode. The LEDs transmit light at a
specific wavelength onto the sample strip and the photo-
diode receives the reflections from the strip. Set the DAC
to provide appropriate bias currents for the LEDs. Always
keep the photodiodes reverse-biased or zero-biased.
SPDT1 and SPDT2 switch between the two LEDs.
The MAX1359B interfaces with electrochemical sen-
sors. The 10-bit DAC with the force-sense buffer has the
flexibility to connect to many different types of sensors.
Use two diode-connected 2N3904 transistors for exter-
nal temperature sensing in Figure 26. Select AIN1 and
AIN2 through the positive and negative mux, respec-
tively. For internal temperature sensor measurements,
set MUXP<3:0> to 0111, and set MUXN<3:0> to 0000.
The analog input signals feed through a PGA to the
ADC for conversion.
Use two op amps and two SPDT switches to implement
a programmable-gain instrumentation amplifier as
shown in Figure 27.
The MAX1359B integrated PWM is available for LCD
bias control, sensor-bias voltage trimming, buzzer
drive, and duty-cycled sleep-mode power-control
schemes. Figure 28 shows the MAX1359B performing
LCD bias control. Figures 30 and 31 show the PWM cir-
cuitry being used in a single-ended and differential
piezoelectric buzzer-driving application.
16-Bit, Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
Figure 24. DAC Bipolar Output Circuit
60
______________________________________________________________________________________
Optical Reflectometry Application with
V
MAX1359B
DAC_
REF
Electrochemical Sensor Operation
Temperature Measurement with
Dual LED and Single Photodiode
R
1
Instrumentation Amplifier
Two Remote Sensors
FB_
Programmable-Gain
OUT_
PWM Applications
R
V
REF
2
= R
= 1.25V
1
R
+3.3V
-3.3V
2
V
OUT
Internal to the MAX1359B, the ADC is 24 bits and is
always in bipolar mode. The OFFSET CAL and GAIN
CAL data are also 24 bits. The conversion to unipolar
and the gain are performed digitally. The default values
for the OFFSET CAL and GAIN CAL registers in the
MAX1359B are 00 0000h and 80 0000h, respectively.
The calibration works as follows:
where ADC is the conversion result in the DATA regis-
ter, RAW is the output of the decimation filter internal to
the MAX1359B, OFFSET is the value stored in the OFF-
SET CAL register, Gain is the value stored in the GAIN
CAL register, and PGA is the selected PGA gain found
in the ADC register as GAIN<1:0>. In unipolar mode, all
negative values return a zero result and an additional
gain of 2 is added.
For self-calibration, the offset value is the RAW result
when the inputs are shorted internally and the gain value
is 1 / (RAW - OFFSET) with the reference connected to
the input. This is done automatically when these modes
are selected. The self offset and gain calibration corrects
for errors internal to the ADC and the results are stored
and used automatically in the OFFSET CAL and GAIN
CAL registers. For best results, use the ADC in the same
configuration as the calibration. This pertains to conver-
sion rate only because the PGA gain and unipolar/bipo-
lar modes are performed digitally.
For system calibration, the offset and gain values cor-
rect for errors in the whole signal path including the
internal ADC and any external circuits in the signal
path. For the system calibration, a user-provided zero-
input condition is required for the offset calibration and
a user-provided full-scale input is required for the gain
calibration. These values are automatically written to
the OFFSET CAL and GAIN CAL registers. The order of
the calibrations should be offset followed by gain.
The offset correction value is in two’s complement. The
default value is 000000h, 00...00b, or 0 decimal.
The gain correction value is an unsigned binary number
with 23 bits to the right of the decimal point. The largest
number is therefore 1.1111...1b = 2 - 2
est is 0.000...0b = 0, although it does not make sense to
use a number smaller than 0.1000...0b = 0.5. The default
value is 800000h, 1.000...0b or 1 decimal.
Changing the offset or gain calibration values does not
affect the value in the DATA register until a new conver-
sion has completed. This applies to all the mode bits
for PGA gain, unipolar/bipolar, etc.
ADC = (RAW - OFFSET) x Gain x PGA
ADC Calibration
-23
and the small-

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