MT41J256M8HX-15E IT:D Micron Technology Inc, MT41J256M8HX-15E IT:D Datasheet - Page 128

• Manufacturer Part Number: MT41J256M8HX-15E IT:D
• Description: MICMT41J256M8HX-15E_IT:D 2GB DDR3 SDRAM
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr

Specifications of MT41J256M8HX-15E IT:D

• Organization: 256Mx8
• Address Bus: 18b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: -40C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 165mA
• Pin Count: 78
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Figure 47: Write Leveling Sequence
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Early remaining DQ
Late remaining DQ
Differential DQS 4
Prime DQ 5
Command
ODT
CK#
CK
MRS 1
Notes:
t MOD
NOP 2
t WLDQSEN
1. MRS: Load MR1 to enter write leveling mode.
2. NOP: NOP or DES.
3. DQS, DQS# needs to fulfill minimum pulse width requirements
4. Differential DQS is the differential data strobe (DQS, DQS#). Timing reference points are
5. DRAM drives leveling feedback on a prime DQ (DQ0 for x4 and x8). The remaining DQ
(MIN) as defined for regular writes. The maximum pulse width is system-dependent.
the zero crossings. The solid line represents DQS; the dotted line represents DQS#.
are driven LOW and remain in this state throughout the leveling procedure.
NOP
t WLMRD
NOP
t DQSL 3
NOP
t WLH
128
T1
NOP
Indicates a Break in
Time Scale
t WLO
t WLO
t WLO
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t DQSL 3
2Gb: x4, x8, x16 DDR3 SDRAM
NOP
t WLS
Undefined Driving Mode
NOP
T2
t DQSH 3
© 2006 Micron Technology, Inc. All rights reserved.
NOP
t WLO
t
DQSH (MIN) and
Write Leveling
NOP
Don’t Care
NOP
t
DQSL