MT41J256M8HX-15E IT:D Micron Technology Inc, MT41J256M8HX-15E IT:D Datasheet - Page 187

• Manufacturer Part Number: MT41J256M8HX-15E IT:D
• Description: MICMT41J256M8HX-15E_IT:D 2GB DDR3 SDRAM
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr

Specifications of MT41J256M8HX-15E IT:D

• Organization: 256Mx8
• Address Bus: 18b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: -40C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 165mA
• Pin Count: 78
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

RESET Operation
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
The RESET signal (RESET#) is an asynchronous signal that triggers any time it drops
LOW, and there are no restrictions about when it can go LOW. After RESET# goes LOW,
it must remain LOW for 100ns. During this time, the outputs are disabled, ODT (R
turns off (High-Z), and the DRAM resets itself. CKE should be brought LOW prior to RE-
SET# being driven HIGH. After RESET# goes HIGH, the DRAM must be reinitialized as
though a normal power-up was executed. All refresh counters on the DRAM are reset,
and data stored in the DRAM is assumed unknown after RESET# has gone LOW.
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x4, x8, x16 DDR3 SDRAM
© 2006 Micron Technology, Inc. All rights reserved.
RESET Operation
TT
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