EP3C5F256C8N Altera, EP3C5F256C8N Datasheet - Page 152

• Manufacturer Part Number: EP3C5F256C8N
• Description: IC CYCLONE III FPGA 5K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C5F256C8N

• Number Of Logic Elements/cells: 5136
• Number Of Labs/clbs: 321
• Total Ram Bits: 423936
• Number Of I /o: 182
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• No. Of Logic Blocks: 321
• Family Type: Cyclone III
• No. Of I/o's: 182
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 402MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2423; EP3C5F256C8N

8–8
Figure 8–2. DQS, CQ, or CQ# Pins in Cyclone III Device Family I/O Banks
Note to
(1) The DQS, CQ, or CQ# pin locations in this diagram apply to all packages in Cyclone III device family except devices in 144-pin EQFP and 164-pin
Cyclone III Device Handbook, Volume 1
MBGA.
Figure
8–2:
1
1
Each DQ group is associated with its corresponding DQS pins, as defined in the
Cyclone III and Cyclone III LS pin tables; for example:
The Quartus
with its associated DQS.
Figure 8–2
Cyclone III device family I/O banks.
For Cyclone III device family memory interface support, only one interface is placed
on each side.
■
■
DQS1L/CQ1L#
DQS3L/CQ3L#
For DDR2 or DDR SDRAM, ×8 DQ group DQ3B[7:0] pins are associated with
the DQS3B pin (same 3B group index)
For QDR II SRAM, ×9 Q read-data group DQ3L[8..0] pins are associated
with DQS2L/CQ3L and DQS3L/CQ3L# pins (same 3L group index)
DQS2L/CQ3L
DQS0L/CQ1L
shows the location and numbering of the DQS, DQ, or CQ# pins in the
®
II software issues an error message if a DQ group is not placed properly
I/O Bank 3
I/O Bank 8
Cyclone III Device Family
Chapter 8: External Memory Interfaces in the Cyclone III Device Family
I/O Bank 7
I/O Bank 4
(Note 1)
Cyclone III Device Family Memory Interfaces Pin Support
DQS3R/CQ3R#
DQS0R/CQ1R
DQS1R/CQ1R#
DQS2R/CQ3R
© January 2010 Altera Corporation