EP3C55F484C8N Altera, EP3C55F484C8N Datasheet - Page 252

IC CYCLONE III FPGA 55K 484FBGA

EP3C55F484C8N

Manufacturer Part Number
EP3C55F484C8N
Description
IC CYCLONE III FPGA 55K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C55F484C8N

Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2396160
Number Of I /o
327
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
55856
# I/os (max)
327
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
55856
Ram Bits
2396160
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
3491
Family Type
Cyclone III
No. Of I/o's
327
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2510

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0
10–4
POR Circuitry
Cyclone III Device Handbook, Volume 1
f
f
1
Cyclone III device family contains POR circuitry to keep the device in a reset state
until the power supply voltage levels have stabilized during power up. During POR,
all user I/O pins are tristated until the V
In addition, the POR circuitry also ensures the V
that contains configuration pins reach an acceptable level before configuration is
triggered.
The POR circuit of the Cyclone III device monitors the V
during power-on. The enhanced POR circuit of the Cyclone III LS device includes
monitoring V
level.
The V
for Cyclone III LS devices only. Cyclone III devices do not have V
After Cyclone III device family enters user mode, the POR circuit continues to
monitor the V
detected. If the V
mode, the POR circuit resets the device. If the V
the POR circuit does not reset the device.
In some applications, it is necessary for a device to wake up very quickly to begin
operation. Cyclone III device family offers the Fast-On feature to support fast
wake-up time applications. For Cyclone III device family, the MSEL[3..0] pin
settings determine the POR time (t
9 ms, while standard POR ranges from 50 ms to 200 ms.
For more information about the MSEL[3..0] pin settings, refer to the
Design Security, and Remote System Upgrades in Cyclone III Devices
For more information about the V
Family Pin Connection
CCBAT
power supply is the new design security feature power supply introduced
CCBAT
CCINT
CCINT
to ensure that V
or V
and V
Guidelines.
CCA
Chapter 10: Hot-Socketing and Power-On Reset in the Cyclone III Device Family
pins so that a brown-out condition during user mode is
CCA
voltage sags below the POR trip point during user
CCBAT
CCBAT
POR
) of the device. Fast POR ranges from 3 ms to
is always at the minimum requirement voltage
pin connection, refer to the
CC
reaches the recommended operating levels.
CCIO
CCIO
voltage sags during user mode,
level of I/O banks 1, 6, 7, and 8
CCINT
© December 2009 Altera Corporation
, V
CCIO
chapter.
CCBAT
Cyclone III Device
, and V
power supply.
Configuration,
CCA
POR Circuitry
pins

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