AT94K10AL-25AJI Atmel, AT94K10AL-25AJI Datasheet - Page 6
AT94K10AL-25AJI
Manufacturer Part Number
AT94K10AL-25AJI
Description
IC FPSLIC 10K GATE 25MHZ 84PLCC
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K10AL-25AJI
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
20K-32K
Fpga Sram
4kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
576
Fpga Gates
10K
Fpga Registers
846
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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2.6
6
The Busing Network
AT94KAL Series FPSLIC
Figure 2-1.
Figure 2-2
resources: a local-bus resource (the middle bus) and two express-bus resources. Bus resources
are connected via repeaters. Each repeater has connections to two adjacent local-bus segments
and two express-bus segments. Each local-bus segment spans four cells and connects to con-
secutive repeaters. Each express-bus segment spans eight cells and bypasses a repeater.
Repeaters regenerate signals and can connect any bus to any other bus (all pathways are legal)
on the same plane. Although not shown, a local bus can bypass a repeater via a programmable
pass gate, allowing long on-chip tri-state buses to be created. Local/local turns are implemented
through pass gates in the cell-bus interface. Express/express turns are implemented through
separate pass gates distributed throughout the array.
= I/O Pad
= AT40K Cell
depicts one of five identical FPGA busing planes. Each plane has three bus
Busing Network
= Repeater Row
= Repeater
= RAM Block
Interface to AVR
1138I–FPSLI–1/08
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