XPC8240LZU200E Freescale Semiconductor, XPC8240LZU200E Datasheet - Page 36

MCU HOST PROCESSOR 352-TBGA

XPC8240LZU200E

Manufacturer Part Number
XPC8240LZU200E
Description
MCU HOST PROCESSOR 352-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheets

Specifications of XPC8240LZU200E

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
200MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
352-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
200MHz
Embedded Interface Type
I2C
Digital Ic Case Style
TBGA
No. Of Pins
352
Supply Voltage Range
2.5V To 2.75V
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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System Design Information
System Design Information
1.7.2
The power consumption numbers provided in Table 5 do not reflect power from the OV
supplies that are non-negligible for the MPC8240. In typical application measurements, the OV
ranged from 200 to 600 mW and the GV
numbers were results of the MPC8240 performing cache-resident integer operations at the slowest
frequency combination of 33:66:166 (PCI:Mem:CPU) MHz. The OV
from the MPC8240 performing continuous flushes of cache lines with alternating ones and zeros to PCI
memory. The GV
combination of 66:100:250 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with
alternating ones and zeros on 64-bit boundaries to local memory.
1.7.3
Due to its dynamic power management feature, large address and data buses, and high operating
frequencies, the MPC8240 can generate transient power surges and high frequency noise in its power
supply, especially while driving large capacitive loads. This noise must be prevented from reaching other
components in the MPC8240 system, and the MPC8240 itself requires a clean, tightly regulated source of
power. Therefore, it is recommended that the system designer place at least one decoupling capacitor at each
V
receive their power from separate V
traces to minimize inductance. These capacitors should have a value of 0.1 µF. Only ceramic SMT (surface
mount technology) capacitors should be used to minimize lead inductance, preferably 0508 or 0603,
oriented such that connections are made along the length of the part.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the V
These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the quick
response time necessary. They should also be connected to the power and ground planes through two vias
to minimize inductance. Suggested bulk capacitors: 100–330 µF (AVX TPS tantalum or Sanyo OSCON).
1.7.4
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. Unused active low inputs should be tied to OV
GND. All NC (no connect) signals must remain unconnected.
Power and ground connections must be made to all external V
MPC8240.
The PCI_SYNC_OUT signal is intended to be routed halfway out to the PCI devices and then returned to
the PCI_SYNC_IN input of the MPC8240.
36
DD
, OV
DD
, GV
Power Supply Sizing
Decoupling Recommendations
Connection Recommendations
DD
, OV
DD
DD
V
, and LV
DD
high-end range’s value resulted from the MPC8240 operating at the fastest frequency
DD
MPC8240 Integrated Processor Hardware Specifications
, GV
DD
Freescale Semiconductor, Inc.
DD
pin of the MPC8240. It is also recommended that these decoupling capacitors
, and LV
10 Ω
Figure 24. PLL Power Supply Filter Circuit
For More Information On This Product,
DD
DD
, OV
Go to: www.freescale.com
DD
2.2 µF
planes, to enable quick recharging of the smaller chip capacitors.
power ranged from 300 to 900 mW. The ranges’ low-end power
DD
, GV
GND
DD
DD
, and GND power planes in the PCB, utilizing short
Low ESL Surface Mount Capacitors
. Unused active high inputs should be connected to
2.2 µF
DD
, OV
DD
AV
, GV
DD
DD
high-end range’s value resulted
DD
, LV
DD
, and GND pins of the
DD
and GV
DD
DD
power
power

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