MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 134

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MC68EC040FE25A

Manufacturer Part Number
MC68EC040FE25A
Description
IC MPU 32BIT 25MHZ 184-CQFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Core Size
32bit
Program Memory Size
8KB
Cpu Speed
25MHz
Digital Ic Case Style
CQFP
No. Of Pins
184
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EC040FE25A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
6.6 MOTOROLA M68040 BSDL DESCRIPTION (VERSION 2.2)
Revision List:
Package Type: 18 x 18 PGA
This BSDL is for the newer MC68040 mask sets of E26A and after (roughly after the
second half of 1992). It does not include the 0.8- m mask sets D43B, D50D, and D98D.
For MC68LC040 and MC68EC040, two pin names have changed. To make the necessary
modifications, change all occurrences of DLE to JS0 and MDIS to JS1.
MOTOROLA
1. LOCK and LOCKE controlled by io.1 vice io.0 (4D98D).
3. No other changes to Version 2.1 BSDL.
2. Instruction opcodes changed for SAMPLE, SHUTDOWN, and BYPASS.
3. New instructions DRVCTL.T, DRVCTL.S and PRIVATE added.
4. New instructions DRVCTL.T and DRVCTL.S renamed to DRVCTL_T and
5. Register access specified for DRVCTL_T, DRVCTL_S, and PRIVATE instructions.
6. No other changes to Version 1.0 BSDL.
entity MC68040 is
generic(PHYSICAL_PIN_MAP:string := "PGA_18x18");
port (TDI:
DRVCTL_S for syntax compatibility.
TDO:
TMS:
TCK:
TRST:
RSTO:
IPEND: buffer
CIOUT: out
UPA:
TT:
A:
D:
LOCKE: out
LOCK:
R_W:
TLN:
TM:
SIZ:
MI:
BR:
TS:
BB:
TIP:
PST:
TA:
TEA:
BG:
SC:
TBI:
AVEC:
TCI:
in
out
in
in
in
buffer
inout
inout
inout
out
inout
out
out
inout
buffer
buffer
inout
inout
out
buffer
inout
in
in
in
in
in
in
out
bit;
bit;
bit;
bit;
bit;
bit;
bit;
bit_vector(0 to 1);
bit_vector(0 to 31);
bit_vector(0 to 31);
bit;
bit;
bit;
bit_vector(0 to 1);
bit_vector(0 to 2);
bit_vector(0 to 1);
bit;
bit;
bit;
bit;
bit;
bit;
bit;
bit;
bit_vector(0 to 1);
bit;
bit;
bit;
bit;
bit_vector(0 to 1);
bit_vector(0 to 3);
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER’S MANUAL
6- 15

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