MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 173

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MC68EC040FE25A

Manufacturer Part Number
MC68EC040FE25A
Description
IC MPU 32BIT 25MHZ 184-CQFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Core Size
32bit
Program Memory Size
8KB
Cpu Speed
25MHz
Digital Ic Case Style
CQFP
No. Of Pins
184
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EC040FE25A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
The M68040 takes an interrupt exception for a pending interrupt within one instruction
boundary after processing any other pending exception with a higher priority. Thus, the
M68040 executes at least one instruction in an interrupt exception handler before
recognizing another interrupt request. The following paragraphs describe the various kinds
of interrupt acknowledge bus cycles that can be executed as part of interrupt exception
processing. Table 7-4 provides a summary of the possible interrupt acknowledge
terminations and the exception processing results.
7.5.1.1 INTERRUPT ACKNOWLEDGE BUS CYCLE (TERMINATED NORMALLY).
When the M68040 processes an interrupt exception, it performs an interrupt acknowledge
bus cycle to obtain the vector number that contains the starting location of the interrupt
exception handler. Some interrupting devices have programmable vector registers that
contain the interrupt vectors for the exception handlers they use. Other interrupting
conditions or devices cannot supply a vector number and use the autovector bus cycle
described in 7.5.1.2 Autovector Interrupt Acknowledge Bus Cycle.
MOTOROLA
High
High
Low
Low
Low
TA
Table 7-4. Interrupt Acknowledge Termination Summary
High
High
High
TEA
Low
Low
Freescale Semiconductor, Inc.
For More Information On This Product,
Don’t Care Insert Waits
Don’t Care Take Spurious Interrupt Exception
Don’t Care Retry Interrupt Acknowledge Cycle
AVEC
High
Low
Go to: www.freescale.com
M68040 USER’S MANUAL
Latch Vector Number on D7–D0 and Take Interrupt
Take Autovectored Interrupt Exception
Exception
Termination Condition
7- 31

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