MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 64

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Page Table Address
U—Used
U0, U1—User Page Attributes
UDT—Upper Level Descriptor Type
UR—User Reserved
W—Write Protected
X—Motorola Reserved
MOTOROLA
This field contains the physical base address of a table of page descriptors. The low-
order bits of the address required to index into the page table are supplied by the logical
address.
The processor automatically sets this bit when a descriptor is accessed in which the
U-bit is clear. In a page descriptor table, this bit is set to indicate that the page
corresponding to the descriptor has been accessed. In a pointer table, this bit is set to
indicate that the pointer has been accessed by the M68040 as part of a table search.
The U-bit is updated before the M68040 allows a page to be accessed. The processor
never clears this bit.
These bits are user defined and the processor does not interpret them. U0 and U1 are
echoed to the UPA0 and UPA1 signals, respectively, if an external bus transfer results
from the access. Applications for these bits include extended addressing and snoop
protocol selection.
These bits indicate whether the next level table descriptor is resident.
00 or 01 = Invalid
10 or 11 = Resident
These single bit fields are reserved for use by the user.
Setting the W-bit in a table descriptor write protects all pages accessed with that
descriptor. When the W-bit is set, a write access or a read-modify-write access to the
logical address corresponding to this entry causes an access error exception to be
taken.
These bit fields are reserved for future use by Motorola.
These codes indicate that the table at the next level is not resident or that
the logical address is out of bounds. All other bits in the descriptor are
ignored. When an invalid descriptor is encountered, an ATC entry is created
for the logical address with the resident bit in the MMUSR clear.
These codes indicate that the page is resident.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER'S MANUAL
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