MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 30

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

1.7 DATA FORMAT SUMMARY
The M68040 supports the basic data formats of the M68000 family. Some data formats
apply only to the IU, some only to the FPU, and some to both. In addition, the instruction
set supports operations on other data formats such as memory addresses.
The operand data formats supported by the IU are the standard twos-complement data
formats defined in the M68000 family architecture plus a new data format (16-byte block)
for the MOVE16 instruction. Registers, memory, or instructions themselves can contain IU
operands. The operand size for each instruction is either explicitly encoded in the
instruction or implicitly defined by the instruction operation.
Whenever an integer is used in a floating-point operation, the FPU automatically converts
it to an extended-precision floating-point number before using the integer. The FPU
implements single- and double-precision floating-point data formats as defined by the
IEEE 754 standard. The FPU does not directly support packed decimal real format.
However, by trapping as an unimplemented data format instead of as an illegal instruction,
software emulation supports the packed decimal format. Additionally, each data format
has a special encoding that represents one of five data types: normalized numbers,
denormalized numbers, zeros, infinities, and not-a-numbers (NANs). Table 1-1 lists the
data formats for both the IU and the FPU. Refer to M68000PM/AD, M68000 Family
Programmer’s Reference Manual, for details on data format organization in registers and
memory.
1.8 ADDRESSING CAPABILITIES SUMMARY
The M68040 supports the basic addressing modes of the M68000 family. The register
indirect addressing modes support postincrement, predecrement, offset, and indexing,
which are particularly useful for handling data structures common to sophisticated
MOTOROLA
Bit
Bit Field
Binary-Coded Decimal (BCD)
Byte Integer
Word Integer
Long-Word Integer
Quad-Word Integer
16-Byte
Single-Precision Real
Double-Precision Real
Extended-Precision Real
Operand Data Format
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 1-1. M68040 Data Formats
1–32 Bits
128 Bits
16 Bits
32 Bits
64 Bits
32 Bits
80 Bits
64 Bits
8 Bits
8 Bits
1 Bit
Size
Go to: www.freescale.com
M68040 USER’S MANUAL
Supported In
IU, FPU
IU, FPU
IU, FPU
FPU
FPU
FPU
IU
IU
IU
IU
IU
Field of Consecutive Bits
Any Two Data Registers
Memory Only, Aligned to 16-Byte Boundary
1-Bit Sign, 8-Bit Exponent, 23-Bit Fraction
1-Bit Sign, 15-Bit Exponent, 64-Bit Mantissa
Packed: 2 Digits/Byte; Unpacked: 1 Digit/Byte
1-Bit Sign, 11-Bit Exponent, 52-Bit Fraction
Notes
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