MC68EC060RC66 Freescale Semiconductor, MC68EC060RC66 Datasheet - Page 285
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68EC060RC66
Manufacturer Part Number
MC68EC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Specifications of MC68EC060RC66
Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
206
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Compliant
- Current page: 285 of 416
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IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9.2 DEBUG PIPE CONTROL MODE
A debug pipe control mode is implemented on the MC68060 to allow special chip functions
to be accomplished. These functions are useful during system level hardware development
and operating system debug. Access to the debug pipe control mode is achieved by negat-
ing the JTAG signal. When in the debug pipe control mode, the regular JTAG interface is
used by the debug pipe control mode, and is therefore not available.
The debug pipe control mode uses the resulting serial interface to load commands that allow
various operations on the processor to occur. Some of the operations are: halt the central
processing unit (CPU), restart the CPU, insert select commands into the primary pipeline,
disable select processor configurations, force all outputs to high-impedance state, release
all outputs from high-impedance state, and generate an emulator interrupt.
The advantage of using the debug pipe control mode is that the processor is allowed to oper-
ate normally and at its normal frequency. The only difference is that the processor no longer
has the regular JTAG interface. This should not be a problem since the regular JTAG inter-
face is not used during normal processor operations.
9-24
"191 (BC_2, *,
"192 (BC_1, A(22),
"193 (BC_2, A(22),
"194 (BC_1, A(23),
"195 (BC_2, A(23),
"196 (BC_1, A(24),
"197 (BC_2, A(24),
"198 (BC_1, A(25),
"199 (BC_2, A(25),
--num cell
"200 (BC_2, *,
"201 (BC_1, A(26),
"202 (BC_2, A(26),
"203 (BC_1, A(27),
"204 (BC_2, A(27),
"205 (BC_1, A(28),
"206 (BC_2, A(28),
"207 (BC_1, A(29),
"208 (BC_2, A(29),
"209 (BC_2, *,
"210 (BC_1, A(30),
"211 (BC_2, A(30),
"212 (BC_1, A(31),
"213 (BC_2, A(31),
end MC68060;
port
control,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
function safe ccell dsval rslt
control,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
control,
input,
output3,
input,
output3,
M68060 USER’S MANUAL
0),
X),
X,
X),
X,
X),
X,
X),
X,
0),
X),
X,
X),
X,
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" &
" & -- a[23:20]
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200,
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&
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&
&
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MOTOROLA
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