VSC8601XKN Vitesse Semiconductor Corp, VSC8601XKN Datasheet - Page 100

• Manufacturer Part Number: VSC8601XKN
• Description: IC PHY 10/100/1000 64-EP-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8601XKN

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP Exposed Pad, 64-eLQFP, 64-HLQFP
• Case: TQFP
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1028

8.8
8.9
Revision 4.1
September 2009
Voltage Overshoot When Using On-Chip Switching
Regulator
Issue: The device’s on-chip switching regulator generates notable voltage overshoot.
Implications: The voltage overshoot from the on-chip switching regulator may lead to
device performance issues such as CRC errors, jitter, or both.
Workaround: When using the on-chip regulator, dampen the overshoot by adding a
snubber circuit on the output of the regulator pins (REG_OUT). This circuit consists of a
15 Ω resistor and 0.001 µF capacitor connected in series to the REG_OUT pins and
ground. For more information about the regulator circuitry connection, see VSC8601
Design and Layout Guide, which is available on the Vitesse Web site at
www.vitesse.com.
Long Link-Up Times Caused by Noise on the
Twisted Pair Interface
Issue: The VSC8601 may experience longer link-up times during the link-up
auto-negotiation process when there is signal noise coming from the link partner.
Implications: Normally, the VSC8601 device successfully links during auto-negotiation
when there is signal noise coming from the link partner. However, on rare occasions,
the link-up time can be significantly increased for successful auto-negotiation.
Workaround: During device initialization, it is strongly recommended that the following
software script is implemented. For more information, see PHY API Software and
Programmers Guide, which is available on the Vitesse Web site at www.vitesse.com.
PhyWrite (PortNo, reg_num(dec), 16_bit_unsigned_data(hex))
PhyRead (PortNo, reg_num(dec))
~ -- Logical NOT
& -- Logical AND
| -- Logical OR
= -- Assign value to variable
PHY_Write (PortNo, 31, 0x52b5);
PHY_Write (PortNo, 16, 0xa7fa); // Necessary write of internal register
reg = PHY_Read (PortNo, 18); // Read internal register and assign it to
var.
PHY_Write (PortNo, 18, reg); // Necessary write of internal register
reg = PHY_Read (PortNo, 17); // Read internal register and assign it to
var.
reg = (reg | 0x0008); // Modify variable value
PHY_Write (PortNo, 17, reg); // Write back modified internal register
PHY_Write (PortNo, 16, 0x87fa) // Necessary write of internal register
PHY_Write (PortNo, 31, 0x0000); // Select main register page
// Select internal register page
Design Considerations
VSC8601 Datasheet
Page 100