VSC8601XKN Vitesse Semiconductor Corp, VSC8601XKN Datasheet - Page 61

• Manufacturer Part Number: VSC8601XKN
• Description: IC PHY 10/100/1000 64-EP-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8601XKN

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP Exposed Pad, 64-eLQFP, 64-HLQFP
• Case: TQFP
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1028

Table 44.
4.3.10
4.3.11
Table 45.
Revision 4.1
September 2009
Extended PHY Control 4, Address 23E (0x17) (continued)
Note Bits 9:8 are only valid if bit 10 is set.
Reserved Extended Registers
The bits in the extended register page space at addresses 24E, 25E, and 26E (0x18,
0x19, and 0x1A, respectively) are reserved.
Extended PHY Control 5
The following table lists the settings available.
Extended PHY Control 5, Address 27E (0x1B)
Bit
7:0
Bit
15
14
13:12
11
10
9
Name
HP Auto-MDIX in
forced 10/100
Reserved
CRS behavior
control
EEPROM present
Far End loopback
mode
PICMG 2.16 reduced
power mode
Name
CRC error counter
Access
Access
R/W
R/W
R/W
R/W
RO
RO
RO
Description
This is a sticky bit.
1 = Disabled.
For more information about HP Auto-MDIX,
see
Detection,”
This is a sticky bit.
Controls the CRS Behavior. The effect of
each setting depends on whether it is
half-duplex or full-duplex operation.
For half-duplex operation:
00: CRS = RX_DV + TX_EN
01: CRS = RX_DV + TX_EN
10: CRS = RX_DV
11: CRS = RX_DV.
For full-duplex operation:
00: CRS = RX_DV
01: CRS = 0
10: CRS = RX_DV
11: CRS = 0.
1 = Configuration EEPROM detected on the
EECLK and EEDAT pins.
1 = Enabled.
This is a sticky bit.
1 = Enabled.
Description
This is a self-clearing bit.
CRC error counter for the Ethernet packet
generator. The value saturates at 0xFF
and subsequently clears when read and
restarts count.
“Automatic Crossover and Polarity
page 20.
VSC8601 Datasheet
Configuration
Default
Default
Page 61
0x00
00
1
0
0
0