ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 28

• Manufacturer Part Number: ELLXT971ABE.A4
• Description: IC TRANS 3.3V ETHERNET 64-BGA
• Manufacturer: Intel
• Type: PHY Transceiverr

Specifications of ELLXT971ABE.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 870479

Intel
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®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
100BASE-FX Far-End Fault Indication. The LXT971A Transceiver independently detects
signal faults from the local fiber transceivers through the SD/TP_L pin. The LXT971A Transceiver
also uses Register bit 1.4 to report Remote Fault indications received from its link partner. The
LXT971A Transceiver ORs both fault conditions to set bit 1.4 to ‘1’. Register bit 1.4 is set once
and clears to ‘0’ when it is read. In fiber operations, the far-end fault detection process requires
idles to establish link. Link does not establish if a far-end fault pattern is the initial signal detected.
Either fault condition causes the LXT971A Transceiver to drop the link unless Forced Link Pass is
selected by setting Register bit 16.14 to ‘1’. A ‘link is down’ condition is then reported with
interrupts and status bits.
In response to locally detected signal faults (that is, the SD/TP_L pin is activated by the local fiber
transceiver), the affected port can transmit the far-end fault code if the fault code transmission is
enabled by Register bit 16.2.
The occurrence of a Far End Fault causes all transmission of data from the Reconciliation Sublayer
to stop and the Far End fault code to begin. The Far End Fault code consists of 84 ones followed by
a single zero. (This pattern must be repeated three times.)
If the LXT971A Transceiver detects a signal fault condition, it can transmit the Far-End Fault
Indication (FEFI) over the fiber link. The FEFI consists of 84 consecutive ones followed by a
single zero. This pattern must be repeated at least three times. The LXT971A Transceiver transmits
the far-end fault code a minimum of three times if all the following conditions are true:
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When Register bit 16.2 = 0, the LXT971A Transceiver does not transmit far end fault code. It
continues to transmit idle code and may or may not drop link depending on the setting for
Register bit 16.14.
When Register bit 16.2 = 1, transmission of the far end fault code is enabled. The LXT971A
Transceiver transmits far end fault code if fault conditions are detected by the SD/TP_L pin.
Fiber mode is selected.
Fault Code transmission is enabled (Register bit 16.2 = 1).
Either Signal Detect indicates no signal, or the receive PLL cannot lock.
Loopback is not enabled.
Document Number: 249414-003
Revision Date: June 18, 2004
Datasheet