ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 42

• Manufacturer Part Number: ELLXT971ABE.A4
• Description: IC TRANS 3.3V ETHERNET 64-BGA
• Manufacturer: Intel
• Type: PHY Transceiverr

Specifications of ELLXT971ABE.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 870479

Intel
5.6.1
42
Figure 10. Clocking for 10BASE-T
Figure 11. Clocking for 100BASE-X
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Note:
MII Clocks
The LXT971A Transceiver is the master clock source for data transmission, and it supplies both
MII clocks (RX_CLK and TX_CLK). It automatically sets the clock speeds to match link
conditions.
Figure 10
The transmit data and control signals must always be synchronized to TX_CLK by the MAC. The
LXT971A Transceiver samples these signals on the rising edge of TX_CLK.
TX_CLK
RX_CLK
XI
•
•
TX_CLK
RX_CLK
XI
When the link is operating at 100 Mbps, the clocks are set to 25 MHz.
When the link is operating at 10 Mbps, the clocks are set to 2.5 MHz.
through
Figure 12
2.5 MHz during auto-negotiation
2.5 MHz during auto-negotiation
show the clock cycles for each mode.
2.5 MHz during auto-negotiation and 10BASE-T Data & Idle
2.5 MHz during auto-negotiation and 10BASE-T Data & Idle
Constant 25 MHz
Constant 25 MHz
25 MHz once 100BASE-X
25 MHz once 100BASE-X
Document Number: 249414-003
Link Established
Link Established
Revision Date: June 18, 2004
B3391-01
Datasheet
B3390-01