ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 9

• Manufacturer Part Number: ELLXT971ABE.A4
• Description: IC TRANS 3.3V ETHERNET 64-BGA
• Manufacturer: Intel
• Type: PHY Transceiverr

Specifications of ELLXT971ABE.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 870479

Datasheet
Document Number: 249414-003
Revision Date: 25-Oct-2005
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Clock Requirements: Modified language under Clock Requirements heading.
Table 21 I/O Characteristics REFCLK: Changed values for Input Clock Duty Cycle under Min from
40 to 35 and under Max from 60 to 65.
Figure 26 “Recommended LXT971A-to-5 V Fiber Transceiver Interface
Figure 27 “ON Semiconductor Triple PECL-to-LVPECL Logic
Table 23 “I/O Characteristics – SD/TP
Table 28 “LXT971A Thermal
Table 57 “Digital Configuration Register (Address
Section 8.0, “Product Ordering
Table 14 “Device ID
Table 17 “Absolute Maximum
Table 18 “Operating
Table 20 “Digital I/O Characteristics - MII
Table 22 “I/O Characteristics - LED/CFG
Table 33 “10BASE-T Receive Timing Parameters”
Table 42 “Register Bit
Table 58 “Transmit Control Register (Address
Figure 25 “Recommended LXT971A-to-3.3 V Fiber Transceiver Interface
Intel
Section 4.3, “The Fiber
®
LXT971A Transceiver Revision 002 (Sheet 2 of 2)
Intel
Intel
®
®
Revision Date: August 6, 2002
LXT971A Transceiver Revision 001
Revision Date: January 2001
Register”.
Conditions”: Added Typ values to Vcc current.
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Map”. (Added Table 26 information).
Characteristics”.
Interface”.
Information”.
Ratings”.
Description
Description
Pin”.
Pins”.
Pins”.
30)”.
26)”.
Translator”.
Circuitry”.
Circuitry”.
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