Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 296
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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PS028702-1210
Bits
6
5
4
3
2
1
0
Description (Continued)
TDH – Transmit drive high
This control bit causes the interface to drive the line high when a logic 1 is being transmitted. If
OE is zero, the line stops being driven when the input is high or at the center of the bit, which-
ever is first. If OE is one, the line is driven high for one clock cycle. This bit is ignored if Debug
Mode is zero and the UART is disabled.
0 = Transmit Drive High disabled.
1 = Transmit Drive High enabled.
HDS – High drive strength
This control bit enabled high drive strength for the output driver.
0 = Low Drive Strength
1 = High Drive Strength
TXFC – Transmitter start bit flow control
This control bit enables start bit flow control on the transmitter. The transmitter waits until a
remote device sends a start bit before transmitting its data.
0 = Transmitter start bit flow control disabled.
1 = Transmitter start bit flow control enabled.
NBEN – 9-bit mode enable
This control bit enables transmission and reception of a ninth data bit.
0 = Nine bit mode disabled.
1 = Nine bit mode enabled.
NB – Value of ninth bit
This bit is the value of the ninth data bit. When written, this reflects the ninth data bit that will be
transmitted if nine bit mode is enabled. When read, this bit reflects the value of the ninth bit of
the final nine-bit character received.
0 = Ninth bit is zero.
1 = Ninth bit is one.
OUT – Output state
This control bit sets the state of the output transceiver. If the UART is enabled, this bit must be
set to 1 to idle high. Clearing this bit to zero when the UART is enabled will transmit a break
condition. If the UART is disabled, this logic value will be driven onto the pin if OE is set. This
bit is ignored in Debug Mode.
0 = Transmit Break if UART enabled. Drive Low if UART disabled and output enabled.
1 = Idle High if UART enabled. Drive high if UART disabled and output enabled.
PIN – Debug pin
This bit reflects the state of the DBG pin.
0 = DBG pin is Low.
1 = DBG pin is High.
P R E L I M I N A R Y
Z16FMC Series Motor Control MCUs
Product Specification
On-Chip Debugger
274
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