Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 67
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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Table 20. Port A–H Output Control Registers (PxOC)
Table 21. Port A–H Pull-Up Enable Registers (PxPUE)
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Bits
Field
RESET
R/W
ADDR
POC[7:0] – Port Output Control
These bits function independently of the alternate function bits and disable the drains
if set to 1.
0 = The drains are enabled for any output mode.
1 = The drain of the associated pin is disabled (open-drain mode).
PUE[7:0] – Port Pull-Up Enable
These bits function independently of the alternate function bit and enable the weak pull-up if set to 1.
0 = The weak pull-up on the port pin is disabled.
1 = The weak pull-up on the port pin is enabled.
Port A–H Pull-Up Enable Registers
Port A–H Stop Mode Recovery Source Enable Registers
POC7
PUE7
R/W
R/W
7
0
7
0
Setting the bits in the Port A–H pull-up enable registers (see Table 21) to 1 enables a weak
internal resistive pull-up on the specified port pins. These registers affect the pins directly
and as a result, alternate functions are also affected.
Setting the bits in the Port A–H Stop Mode Recovery source enable registers (see
Table 22) to 1 configures the specified port pins as a Stop Mode Recovery source. During
POC6
PUE6
R/W
R/W
6
0
6
0
FF_E106, FF_E116, FF_E126, FF_E136, FF_E146,
FF_E107, FF_E117, FF_E127, FF_E137, FF_E147,
FF_E156, FF_E166, FF_E176, FF_E186, FF_E196
FF_E157, FF_E167, FF_E177, FF_E187, FF_E197
POC5
PUE5
R/W
R/W
5
0
5
0
P R E L I M I N A R Y
POC4
PUE4
R/W
R/W
4
0
4
0
POC3
PUE3
R/W
R/W
Z16FMC Series Motor Control MCUs
3
0
3
0
POC2
PUE2
R/W
R/W
2
0
2
0
General-Purpose Input/Output
Product Specification
POC1
PUE1
R/W
R/W
1
0
1
0
POC0
PUE0
R/W
R/W
0
0
0
0
45
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