ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 104

• Manufacturer Part Number: ST92T163R4T1
• Description: Microcontrollers (MCU) OTP EPROM 20K USB/I2
• Manufacturer: STMicroelectronics

Specifications of ST92T163R4T1

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 20 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SCI, USB
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-64
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

ST92163 - TIMER/WATCHDOG (WDT)
8 ON-CHIP PERIPHERALS
8.1 TIMER/WATCHDOG (WDT)
Important Note: This chapter is a generic descrip-
tion of the WDT peripheral. However depending
on the ST9 device, some or all of WDT interface
signals described may not be connected to exter-
nal pins. For the list of WDT pins present on the
ST9 device, refer to the device pinout description
in the first section of the data sheet.
8.1.1 Introduction
The Timer/Watchdog (WDT) peripheral consists of
a programmable 16-bit timer and an 8-bit prescal-
er. It can be used, for example, to:
– Generate periodic interrupts
– Measure input signal pulse widths
– Request an interrupt after a set number of events
– Generate an output signal waveform
– Act as a Watchdog timer to monitor system in-
Figure 61. Timer/Watchdog Block Diagram
104/224
tegrity
1
HW0SW 1
Pin not present on some ST9 devices
WDIN
NMI
INT0
1
1
1
1
CLOCK CONTROL LOGIC
INEN INMD1 INMD2
WDGEN
INPUT
&
INTCLK/4
MUX
.
TLIS
IAOS
MUX
CONTROL LOGIC
INTERRUPT
WDT
CLOCK
8-BIT PRESCALER
The main WDT registers are:
– Control register for the input, output and interrupt
– 16-bit counter register pair (WDTHR, WDTLR)
– Prescaler register (WDTPR)
The hardware interface consists of up to five sig-
nals:
– WDIN External clock input
– WDOUT Square wave or PWM signal output
– INT0 External interrupt input
– NMI Non-Maskable Interrupt input
– HW0SW1 Hardware/Software Watchdog ena-
logic blocks (WDTCR)
ble.
WDTPR
OUTMD
OUTPUT CONTROL LOGIC
TOP LEVEL INTERRUPT REQUES T
RESET
INTA0 REQUEST
WROUT
DOWNCOU NTER
WDTRH , WDTRL
16-BIT
OUTEN
END OF
COUNT
WDOUT
1