ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 126

• Manufacturer Part Number: ST92T163R4T1
• Description: Microcontrollers (MCU) OTP EPROM 20K USB/I2
• Manufacturer: STMicroelectronics

Specifications of ST92T163R4T1

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 20 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SCI, USB
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-64
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

ST92163 - MULTIFUNCTION TIMER (MFT)
MULTIFUNCTION TIMER (Cont’d)
TIMER CONTROL REGISTER (TCR)
R248 - Read/Write
Register Page: 10
Reset value: 0000 0000 (00h)
Bit 7 = CEN: Counter enable .
This bit is ANDed with the Global Counter Enable
bit (GCEN) in the CICR register (R230). The
GCEN bit is set after the Reset cycle.
0: Stop the counter and prescaler
1: Start the counter and prescaler (without reload).
Note: Even if CEN=0, capture and loading will
take place on a trigger event.
Bit 6 = CCP0: Clear on capture .
0: No effect
1: Clear the counter and reload the prescaler on a
Bit 5 = CCMP0: Clear on Compare .
0: No effect
1: Clear the counter and reload the prescaler on a
Bit 4 = CCL: Counter clear .
This bit is reset by hardware after being set by
software (this bit always returns “0” when read).
0: No effect
1: Clear the counter without generating an inter-
126/224
CEN
REG0R or REG1R capture event
CMP0R compare event
rupt request
7
CCP
0
CCMP
0
CCL UDC
UDC
S
OF0
CS
0
Bit 3 = UDC: Up/Down software selection .
If the direction of the counter is not fixed by hard-
ware (TxINA and/or TxINB pins, see par. 10.3) it
can be controlled by software using the UDC bit.
0: Down counting
1: Up counting
Bit 2 = UDCS: Up/Down count status .
This bit is read only and indicates the direction of
the counter.
0: Down counting
1: Up counting
Bit 1 = OF0: OVF/UNF state .
This bit is read only.
0: No overflow or underflow occurred
1: Overflow or underflow occurred during a Cap-
Bit 0 = CS Counter Status .
This bit is read only and indicates the status of the
counter.
0: Counter halted
1: Counter running
ture on Register 0