ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 77
ST92T163R4T1
Manufacturer Part Number
ST92T163R4T1
Description
Microcontrollers (MCU) OTP EPROM 20K USB/I2
Manufacturer
STMicroelectronics
Datasheet
1.ST92T163R4T1.pdf
(224 pages)
Specifications of ST92T163R4T1
Data Bus Width
8 bit, 16 bit
Program Memory Type
EPROM
Program Memory Size
20 KB
Data Ram Size
2 KB
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
64
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No
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Price
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5.3 CLOCK MANAGEMENT
The various programmable features and operating modes of the CCU are handled by four registers:
– MODER (Mode Register)
– CLKCTL (Clock Control Register)
Figure 36. Clock Control Unit Programming
This is a System Register (R235, Group E).
The input clock divide-by-two and the CPU clock
prescaler factors are handled by this register.
This is a Paged Register (R240, Page 55).
The low power modes and the interpretation of
the HALT instruction are handled by this register.
(CLK_FLAG)
XTSTOP
oscillator
oscillator
Quartz
Internal
Wait for Interrupt and Low Power Modes:
LPOWFI (CLKCTL) selects Low Power operation automatically on entering WFI mode.
WFI_CKSEL (CLKCTL) selects the CK_AF clock automatically, if present, on entering WFI mode.
XTSTOP (CLK_FLAG) automatically stops the Xtal oscillator when the CK_AF clock is present and selected.
RC
CLOCK1
WFI and LPOWFI=1 and WFI_CKSEL = 1
1/2
1/16
(MODER)
DIV2
0
1
CLOCK2
0
1
ST92163 - RESET AND CLOCK CONTROL UNIT (RCCU)
CK_AF
6/8/10/14
MX(1:0)
PLL
x
(USB CLOCK)
(PLLCONF)
OUTPLL_2
1/16
DX(2:0)
– CLK_FLAG (Clock Flag Register)
– PLLCONF (PLL Configuration Register)
1/N
This is a Paged Register (R242, Page 55).
This register contains various status flags, as
well as control bits for clock selection.
This is a Paged Register (R246, Page 55).
The PLL multiplication and division factors are
programmed in this register.
CSU_CKSEL
(CLK_FLAG)
0
1
XT_DIV16
0
1
(CLK_FLAG)
CKAF_SEL
(CLKCTL)
CKAF_ST
0
1
CPU Clock Prescaler
Peripherals
INTCLK
and
to
77/224
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