M69000 Asiliant Technologies, M69000 Datasheet - Page 110

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

CR0C
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 0Ch
7-0
&+,36
7
Start Address Bits 15-8
This register provides bits 15 through 8 of either a 16-bit or 20-bit value that specifies the memory
address offset from the beginning of the frame buffer at which the data to be shown in the active
display area begins.
In standard VGA modes, where bit 0 of the I/O Control Register (XR09) is set to 0, the start address
is specified with a 16-bit value. The eight bits of this register provide the eight most significant bits
of this value, while the eight bits of the Start Address Low Register (CR0D) provide the eight least
significant bits.
In extended modes, where bit 0 of the I/O Control Register (XR09) is set to 1, the start address is
specified with a 20-bit value. The four most significant bits are provided by bits 3-0 of the Extended
Start Address Register (CR40), bits 15 through 8 of this value are provided by this register and the
eight least significant bits are provided by the Start Address Low Register (CR0D). Note that in
extended modes, these 20 bits are double-buffered and synchronized to VSYNC to ensure that
changes occurring on the screen as a result of changes in the start address always have a smooth
or instantaneous appearance. To change the start address in extended modes, all three registers
must be set for the new value, and then bit 7 of CR40 must be set to 1. When this is done the
hardware will update the start address on the next VSYNC. When this update has been performed,
the hardware will set bit 7 of CR40 back to 0.
69000 Databook
Start Address High Register
6
5
Subject to Change Without Notice
CRT Controller Registers
Start Address Bits 15-8
4
3
2
Revision 1.3 8/31/98
1
0
9-17