M69000 Asiliant Technologies, M69000 Datasheet - Page 174

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

XR08
read-only at I/O address 3D7h with index at I/O address 3D6h set to 08h
7-2
1
Note: The reset state of this pin is also readable via bit 1 of the Configuration Pins 0 Register (XR70).
0
&+,36
7
Reserved
These bits always return the value of 0 when read.
PCI VGA Address Decode Enable
This bit reflects the state of memory interface address pin CFG1 during reset.
0: Indicates that VGA I/O Address decoding is disabled on the PCI Bus, so access to the registers
via I/O read and write operations is disabled.
1: Indicates that VGA I/O Address decoding is enabled on the PCI Bus, so access to the registers
via I/O read and write operations is enabled.
Reserved
This bit always returns the value of 0 when read.
69000 Databook
Host Bus Configuration Register
6
5
Reserved
(0000:00)
Subject to Change Without Notice
Extension Registers
4
3
2
Addr Dec
PCI VGA
(x)
Revision 1.3 8/31/98
1
Reserved
(0)
0
14-7