M69000 Asiliant Technologies, M69000 Datasheet - Page 116

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

CR14
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 14h
7
6
Note:
5
Note:
4-0
&+,36
Reserved
7
Reserved
Doubleword Mode
0: Frame buffer addresses are interpreted by the frame buffer address decoder as being either byte
addresses or word addresses, depending upon the setting of bit 6 of the CRT Mode Control
Register (CR17).
1: Frame buffer addresses are interpreted by the frame buffer address decoder as being
doubleword addresses regardless of the setting of bit 6 of the CRT Mode Control Register (CR17).
This bit is used in conjunction with bits 6 and 5 of the CRT Mode Control Register (CR17) to select
how frame buffer addresses from the CPU are interpreted by the frame buffer address decoder as
shown below:
Count By 4
0: The memory address counter is incremented either every character clock or every other
character clock, depending upon the setting of bit 3 of the CRT Mode Control Register.
1: The memory address counter is incremented either every 4 character clocks or every 2 character
clocks, depending upon the setting of bit 3 of the CRT Mode Control Register.
This bit is used in conjunction with bit 3 of the CRT Mode Control Register (CR17) to select the
number of character clocks are required to cause the memory address counter to be incremented
as shown, below:
Underline Location
These 5 bits specify which horizontal line of pixels in a character box is to be used to display a
character underline in text mode. The horizontal lines of pixels within a character box are numbered
from top to bottom, with the top-most line being number 0. The value specified by these 5 bits
should be the number of the horizontal line on which the character underline mark is to be shown.
69000 Databook
Dword Mode
Underline Location Register
6
Count By 4
CR14
Bit 5
0
0
1
1
CR14
5
Bit 6
0
0
1
1
Subject to Change Without Notice
CR17
Bit 3
0
1
0
1
CRT Controller Registers
CR17
Bit 6
0
1
0
1
4
Address Incrementing Interval
every 2 character clocks
every 4 character clocks
every 2 character clocks
every character clock
Addressing Mode
Doubleword Mode
Doubleword Mode
Word Mode
Byte Mode
3
Underline Location
2
Revision 1.3 8/31/98
1
0
9-23