TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 135
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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6.4
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
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Each interrupt source has an enable bit, status bit, interrupt out enable bit, and two map bits.
The edge sensitive interrupts also have a clear bit. These bits can be programmed in the
Tsi148 Interrupt registers (see
VMEbus Interrupt Handler
Tsi148 has seven VMEbus Interrupt Acknowledge registers which generate an IACK cycle on
the VMEbus when they are read. There is one IACK register for each of the VMEbus
IRQ[7:1] signals (see
The interrupt handler has the following features:
•
•
DMA controllers
VMEbus Interrupter Acknowledged
VMEbus Edge (Broadcast interrupt, Clock and 64-bit Counter)
PCI Error
Mailbox[3:0]
Location Monitor [3:0]
Supports 8, 16, and 32-bit IACK cycles
— A word read of the IACK registers causes a 32-bit IACK cycle on the VMEbus
— A half-word read causes a 16-bit IACK cycle on the VMEbus
— A byte read causes an 8-bit IACK cycle on the VMEbus
Once the IACK cycle is generated the interrupter supplies its status/ID.
The Tsi148 expects the interrupt handling intelligence to exist on the local
(PCI/X) bus. The Tsi148 does not have the ability to route local interrupt outputs
(INTA_, INTB_, INTC_, INTD_) to VMEbus interrupt outputs (IRQ[7:1])
“VMEbus IACK (1-7) Registers” on page
Section 10.4.69 on page
6. Interrupt Controller > VMEbus Interrupt Handler
306).
243).
135
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