TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 78
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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3. PCI/X Interface > PCI Mode
78
6. After arbitration, the Linkage Module passes the command information, address
7. The VME Master completes the write transaction to the addressed VMEbus slave.
Transaction Terminations
The PCI Target can terminate a transaction with a retry or a disconnect. The PCI Target
terminates the transaction with a retry in the following cases:
•
•
•
•
The PCI Target terminates the transaction with a disconnect in the following cases:
•
•
•
•
•
information, and the write data to one of the VME Master’s write buffers.
The transaction is a memory write and the PCI Target write buffer is full
The transaction is the first transaction of a memory read
The transaction is a memory read that does not match a pending memory read
The transaction is a memory read that matches a pending memory read but the data is not
available
A write with byte holes is received and the Stop on Byte Holes (SBH) bit in the PCI
Control Register is set (see
A transfer reaches the end of a PCI Target image
The burst ordering is non-linear
A burst read requires more data than was prefetched
A write burst fills the PCI Target write buffer
Having two write buffers allows the VME Master to accept two write transactions
from the Linkage Module.
The Tsi148 PCI Target never terminates a transaction with a Target-abort.
Section 10.4.36 on page
Tsi148 PCI/X-to-VME Bus Bridge User Manual
259)
80A3020_MA001_13
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