ADF7023-JBCPZ Analog Devices Inc, ADF7023-JBCPZ Datasheet - Page 27

• Manufacturer Part Number: ADF7023-JBCPZ
• Description: TXRX FSK/GFSK/MSK/GMSK 32LFCSP
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of ADF7023-JBCPZ

• Frequency: 902MHz ~ 958MHz
• Data Rate - Maximum: 300kbps
• Modulation Or Protocol: FSK, GFSK, GMSK, MSK
• Applications: ISM
• Power - Output: 13.5dBm
• Sensitivity: -116dBm
• Voltage - Supply: 2.2 V ~ 3.6 V
• Current - Receiving: 12.8mA
• Current - Transmitting: 32.1mA
• Data Interface: PCB, Surface Mount
• Memory Size: -
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-WFQFN Exposed Pad, CSP
• Rf Ic Case Style: LFCSP
• No. Of Pins: 32
• Supply Voltage Range: 2.2V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Transmitting Current: 32.1mA
• Data Rate: 300Kbps
• Modulation Type: 2FSK, GFSK, MSK
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

RADIO CONTROL
The ADF7023-J has five radio states designated PHY_SLEEP,
PHY_OFF, PHY_ON, PHY_TX, and PHY_RX. The host processor
can transition the ADF7023-J between states by issuing single
byte commands over the SPI interface. The various commands
and states are illustrated in Figure 47. The communications
processor handles the sequencing of various radio circuits and
critical timing functions, thereby simplifying radio operation
and easing the burden on the host processor.
RADIO STATES
PHY_SLEEP
In this state, the device is in a low power sleep mode. To enter
the state, issue the CMD_PHY_SLEEP command, either from
the PHY_OFF or PHY_ON state. To wake the radio from the
state, set the CS pin low or use the wake-up controller (32.768 kHz
RC or 32.768 kHz crystal) to wake the radio from this state. The
wake-up timer should be set up before entering the PHY_SLEEP
state. If retention of BBRAM contents is not required, Deep
Sleep Mode 2 can be used to further reduce the PHY_SLEEP
state current consumption. Deep Sleep Mode 2 is entered by
issuing the CMD_HW_RESET command. The options for
the PHY_SLEEP state are detailed in
PHY_OFF
In the PHY_OFF state, the 26 MHz crystal, the digital regulator,
and the synthesizer regulator are powered up. All memories are
fully accessible. The BBRAM registers must be valid before exiting
this state.
PHY_ON
In the PHY_ON state, along with the crystal, the digital regulator,
the synthesizer regulator, the VCO, and the RF regulators are
powered up. A baseband filter calibration is performed when
this state is entered from the PHY_OFF state if the BB_CAL bit
in the MODE_CONTROL register (Address 0x11A) is set. The
device is ready to operate, and the PHY_TX and PHY_RX states
can be entered.
Table 10. Current Consumption in ADF7023-J Radio States
State
PHY_SLEEP (Deep Sleep Mode 2)
PHY_SLEEP (Deep Sleep Mode 1)
PHY_SLEEP (RCO Mode )
PHY_SLEEP (XTO Mode )
PHY_OFF
PHY_ON
PHY_TX
PHY_RX
Table 10
Current (Typical)
0.18 μA
0.33 μA
0.75 μA
1.28 μA
1.0 mA
1.0 mA
24.1 mA
12.8 mA
.
Conditions
Wake-up timer off, BBRAM contents not retained, entered by
issuing CMD_HW_RESET
Wake-up timer off, BBRAM contents retained
Wake-up timer on using a 32 kHz RC oscillator, BBRAM contents retained
Wake-up timer on using a 32 kHz XTAL oscillator, BBRAM contents retained
10 dBm, single-ended PA, 950 MHz
Rev. 0 | Page 27 of 100
PHY_TX
In the PHY_TX state, the synthesizer is enabled and calibrated.
The power amplifier is enabled, and the device transmits at the
channel frequency defined by the CHANNEL_FREQ[23:0]
setting (Address 0x109 to Address 0x10B). The state is entered by
issuing the CMD_PHY_TX command. The device automatically
transmits the transmit packet stored in the packet RAM. After
transmission of the packet, the PA is disabled, and the device
automatically returns to the PHY_ON state and can, optionally,
generate an interrupt.
In sport mode, the device transmits the data present on the GP2
pin as described in the Sport Mode section. The host processor
must issue the CMD_PHY_ON command to exit the PHY_TX
state when in sport mode.
PHY_RX
In the PHY_RX state, the synthesizer is enabled and calibrated.
The ADC, RSSI, IF filter, mixer, and LNA are enabled. The
radio is in receive mode on the channel frequency defined by
the CHANNEL_FREQ[23:0] setting (Address 0x109 to
Address 0x10B).
After reception of a valid packet, the device returns to the
PHY_ON state and can, optionally, generate an interrupt.
In sport mode, the device remains in the PHY_RX state
until the CMD_PHY_ON command is issued.
Current Consumption
The typical current consumption in each state is detailed
in Table 10.
ADF7023-J