TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 146
TMPR4937XBG-300
Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet
1.TMPR4937XBG-300.pdf
(552 pages)
Specifications of TMPR4937XBG-300
Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant
Available stocks
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Part Number:
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OE*/BUSSPRT*
7.5.9
OE*/BUSSPRT*
ADDR[19:0]
DATA[31:0]
SYSCLK
ADDR[19:0]
DATA[31:0]
SWE*
BWE*
ACE*
ACK*
SYSCLK
CE*
BE*
Figure 7.5.23 1-word Single Write (0 Wait, SHWT=0, External ACK*, 32-bit Bus)
Figure 7.5.24 1-word Single Read (0 Wait, SHWT=0, External ACK*, 32-bit Bus)
External ACK Mode Access (32-bit Bus)
SWE*
BWE*
ACE*
ACK*
CE*
BE*
Note 1: The TX4937 sets the ACK* signal to High Impedance in the S1 State.
Note 2: External devices drive the ACK* signal to Low (assert the signal) by the ES1 State.
Note 3: External devices drive the ACK* signal to High (deassert the signal) in the ES2
f
State. If an external device is late in asserting ACK*, then the Wait State is inserted
for the amount of time the external device is late. If a certain condition is met, it is
okay for the ACK* signal to be driven to Low for 1 clock cycle or more. See 7.3.7.4
ACK* Input Timing (External ACK Mode) for more information.
f
f
S1
S1
ES1
ES1
7-46
ES2
ES2
Chapter 7 External Bus Controller
f
0
0
0
ES3
S2
S2
S3
S3
f
f
f
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