TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 220
TMPR4937XBG-300
Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet
1.TMPR4937XBG-300.pdf
(552 pages)
Specifications of TMPR4937XBG-300
Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant
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9.3.2
9.3.2.1
Address Mapping
Physical Address Mapping
Address field (SDCCRn.BA[35:21]) of the SDRAM Channel Control Register and the Address
Mask Field (SDCCRn.AM[35:21]).
AND of each bit, and "!" represents the logical NOT of each bit.
bus controllers or PCI controllers are simultaneously selected.
It is possible to map each of the four channels to an arbitrary physical address using the Base
The channel that becomes True in the following equation is selected.
In the above equation, "paddr" represents the accessed physical address, "&" represents the
Operation is undefined when multiple channels are simultaneously selected, or when external
paddr[35:21] & !AM[35:21] = BA[35:21] & !AM[35:21]
9-4
Chapter 9 SDRAM Controller
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