P80C557E4EFB NXP Semiconductors, P80C557E4EFB Datasheet - Page 33

P80C557E4EFB

Manufacturer Part Number
P80C557E4EFB
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P80C557E4EFB

Cpu Family
80C
Device Core
80C51
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
I2C/UART
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
1KB
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant

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1. These bit rates are for “fast-mode” I
Philips Semiconductors
When SIO1 is in a master mode serial clock frequency is
determined by the clock rate bits CR2, CR1 and CR0. The various
bit rates are shown in Table 25.
Table 25.
NOTE:
The data shown in Table 25 do not apply to SIO1 in a slave mode. In
the slave modes, SIO1 will automatically synchronize with any clock
frequency up to 400kHz.
Serial status register S1STA
S1STA is a read only register.
The contents of the status register may be used as a vector to a
service routine. This optimizes the response time of the software
and consequently that of the I
Table 26. Description of S1STA bits
The following is a list of the status codes:
Table 27. MST/TRX mode
1999 Mar 02
Single-chip 8-bit microcontroller
CR2
1
1
1
1
0
0
0
0
S1STA (D9H)
S1STA VALUE
S1STA.7 to 3
S1STA.2 to 0
Selection of I
08H
10H
18H
20H
28H
30H
38H
BIT
CR1
0
0
1
1
0
0
1
1
2
C-bus.
2
C-bus bit rate
SC4
5-bit status code
These bits are held LOW (for service routine vector increment 8)
A START condition has been transmitted
A repeated START condition has been transmitted
SLA and W have been transmitted, ACK has been received
SLA and W have been transmitted, ACK received
DATA and S1DAT has been transmitted, ACK received
DATA and S1DAT has been transmitted, ACK received
Arbitration lost in SLA, R/W or DATA
7
2
C bus applications and cannot be used for bit rates up to 100 kbit/sec.
CR0
0
1
0
1
0
1
0
1
SC3
6
Figure 31. Serial status (S1STA) register.
SC2
5
33
SC1
4
200
300
400
P83C557E4/P80C557E4/P89C557E4
12MHz
100
50
75
3.75
7.5
1
1
1
DESCRIPTION
FUNCTION
SC0
BIT RATE (kHz) at f
3
0
2
CLK
1
0
400
16MHz
100
266.7
66.7
10
5
1
Product specification
1
0
0

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