P80C557E4EFB NXP Semiconductors, P80C557E4EFB Datasheet - Page 35

• Manufacturer Part Number: P80C557E4EFB
• Manufacturer: NXP Semiconductors

Specifications of P80C557E4EFB

• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: I2C/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 1KB
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
The data shift register S1DAT
This register contains the serial data to be transmitted or data which
has been received. Bit 7 is transmitted or received first; i.e., data is
shifted from right to left.
The address register S1ADR
This 8-bit register may be loaded with the 7-bit slave address to
which the controller will respond when programmed as a slave
receiver/transmitter. The LSB (GC) is used to determine whether the
general call address is recognized.
Table 32. Description of S1ADR bits
1999 Mar 02
Single-chip 8-bit microcontroller
SYMBOL
SLA6 to 0
GC
S1DAT (DAH)
S1ADR (DBH)
S1ADR.7 to 1
S1ADR.0
BIT
S1DAT.7
SLA6
7
7
Own slave address
0 = general call address is not recognized
1 = general call address is recognized
S1DAT.6
SLA5
6
6
Figure 32. Data shift register.
Figure 33. Address register.
S1DAT.5
SLA4
5
5
S1DAT.4
35
SLA3
4
4
P83C557E4/P80C557E4/P89C557E4
S1DAT.3
SLA2
FUNCTION
3
3
S1DAT.2
SLA1
2
2
S1DAT.1
SLA0
1
1
Product specification
S1DAT.0
GC
0
0