P80C557E4EFB NXP Semiconductors, P80C557E4EFB Datasheet - Page 6

• Manufacturer Part Number: P80C557E4EFB
• Manufacturer: NXP Semiconductors

Specifications of P80C557E4EFB

• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: I2C/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 1KB
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
4.1 PIN DESCRIPTION
1999 Mar 02
SYMBOL
AV
AV
AV
AV
AV
AV
P5.7 – P5.0
V
V
V
V
ADEXS
PWM0
PWM1
EW
P4.0 – P4.7
RSTIN
RSTOUT
P1.0 – P1.7
SCL
SDA
DD1
DD3
SS1
SS3
Single-chip 8-bit microcontroller
ref–
ref+
SS1
DD1
SS2
DD2
, V
, V
, V
, V
SS2
SS4
DD2
DD4
,
PIN
1
2
3
4
77
76
5 – 12
14, 28,
53, 66
13, 29,
54, 67
15
16
17
18
19 – 22
24 – 27
31 – 38
30
23
39
40
DESCRIPTION
Low end of analog to digital conversion reference resistor
High end of analog to digital conversion reference resistor.
Analog ground for ADC
Analog power supply (+5 V) for ADC
Analog ground; for PLL oscillator
Analog power supply; (+5 V) for PLL oscillator
Port 5
8-bit input port
Port pin
P5.0–P5.7
Digital power supply: +5 V power supply pins during normal operation and power reduction modes. All pins
must be connected.
Digital ground: circuit ground potential. All pins must be connected.
Start ADC operation: Input starting analog to digital conversion triggered by a programmable edge (ADC
operation can also be started by software). This pin must not float
Pulse width modulation output 0
Pulse width modulation output 1
Enable watchdog timer: Enable for T3 watchdog timer and disable Power-down Mode.This pin must not
float.
Port 4
8-bit quasi-bidirectional I/O port
Port pin
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
Reset: Input to reset the P8xC557E4.
Reset: Output of the P8xC557E4 for resetting peripheral devices during initialization and Watchdog Timer
overflow.
Port 1
8-bit quasi-bidirectional I/O port
Port pin
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
I
I
If SCL and SDA are not used, they must be connected to V
2
2
C-bus serial clock I/O port
C-bus serial data I/O port
Alternative function
Eight input channels to ADC (ADC0–ADC7)
Alternative function
CMSR0 }
CMSR1 }
CMSR2 } compare and set/reset
CMSR3 } outputs on a match with timer T2
CMSR4 }
CMSR5 }
CMT0 } compare and toggle outputs
CMT1 }
Alternative function
CT0I/INT2}
CT1I/INT3} :
CT2I/INT4}
CT3I/INT5}
T2
RT2
:
:
6
P83C557E4/P80C557E4/P89C557E4
on a match with timer T2
Capture timer inputs for
timer T2 or external interrupt inputs
T2 event input, rising edge triggered
T2 timer reset input, rising edge triggered
SS
.
Product specification