TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 61

• Manufacturer Part Number: TXC-04251AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04251AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

MEMORY MAP
The QT1M memory map consists of counters and register bit positions which may be accessed by the micro-
processor. The memory map segment consists of FF hex address locations. Addresses that are unused or
unlisted register locations must not be accessed by the microprocessor. Unused bit positions within register
locations will contain unspecified values when read, unless a 0 or 1 value is indicated in the tables below, or the
address has been written by the microprocessor, in which case unused bit positions must always be set to 0.
All counters saturate at full count and are cleared when they are read. Reserved registers are put in a state to
ensure proper operation when the device is given a power-up reset. The memory map has the following
address structure:
The common memory map segment consists of the Control, Provisioning, Interrupt Indication, and Interrupt
Status registers. The A bus segment consists of the A Drop and Add status registers. The B bus segment con-
sists of the B Drop and Add status registers. Each Port n memory map segment (e.g., Port 1) consists of the
Desynchronizer, Provisioning, Status, and Operations registers.
DEVICE ID
* Note: Status codes are R=Read Only; R(L)=Read Only (Latched); R/W=Read/Write; W=Write Only.
Address 00H, bit 0 is a fixed 1 value. The 11-bit field from address 01H, bit 3 (MSB) to address 00H, bit 1 (LSB)
contains the binary equivalent of the manufacturer ID assigned to TranSwitch, which is 107 (decimal). The 16-
bit field from address 03H, bit 3 (MSB) to address 01H, bit 4 (LSB) contains the binary equivalent of the manu-
facturer’s numeric code assigned to the QT1M device (04251 decimal).
Address
(Hex)
00
01
02
03
04
Status *
R
R
R
R
R
Bit 7
1
1
0
Revision (Version) Level
Mask Level (0000)
Bit 6
1
0
0
Device ID
Reserved
Registers
Reserved
Common
A Bus
B Bus
Port 1
Port 2
Port 3
Port 4
Bit 5
0
1
0
DATA SHEET
- 61 -
Bit 4
C0H-EFH
30H-5FH
60H-8FH
90H-BFH
F0H-FFH
00H-04H
05H-0FH
10H-21H
22H-25H
26H-29H
1
1
0
Bit 3
0
0
1
0
Bit 2
Growth (0000)
1
0
0
0
Bit 1
1
0
0
0
Ed. 4, March 2000
TXC-04251
TXC-04251-MB
Bit 0
QT1M
1
0
1
1