TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 70

TXC-04251AIPQ

Manufacturer Part Number
TXC-04251AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04251AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
TXC-04251-MB
Ed. 4, March 2000
QT1M
TXC-04251
COMMON REGISTERS - INTERRUPT INDICATION REGISTER DESCRIPTIONS
Address
Address
15
20
4-0
Bit
Bit
7
6
5
7
6
5
4
3
2
1
0
RESTAB Reset A Side Bus Alarms: A 1 clears the alarms associated with the A side
RESTBB Reset B Side Bus Alarms: A 1 clears the alarms associated with the B side
Symbol
Symbol
Unused
Unused
RESET
PORT4
PORT3
PORT2
PORT1
ASIDE
BSIDE
INT
Reset: A 1 clears all controls (except A and B high impedance bits), alarms,
internal counters, performance counters, and re-centers the receive and
transmit FIFOs. This bit is self-clearing, and will reset to 0 after the reset cycle
is completed.
bus. This bit is self-clearing, and will reset to 0 after the reset cycle is
completed.
bus. This bit is self-clearing, and will reset to 0 after the reset cycle is
completed.
Unused: These bits must be written to 0.
Software Interrupt Indication: A 1 indicates that a positive, negative, or
positive and negative alarm transition has occurred. The corresponding
interrupt mask bit must be set to 1 for this indication to occur.
Unused: This bit reads out as 0.
A Side Interrupt Indication: Enabled when a 1 is written into the AMSK bit.
A 1 indicates that an alarm has occurred in one of the A-side alarm registers.
B Side Interrupt Indication: Enabled when a 1 is written into the BMSK bit.
A 1 indicates that an alarm has occurred in one of the B-side alarm registers.
Port 4 Interrupt Indication: Enabled when a 1 is written into the P4MSK bit.
A 1 indicates that an alarm has occurred in one of the port 4 alarm registers.
Port 3 Interrupt Indication: Enabled when a 1 is written into the P3MSK bit.
A 1 indicates that an alarm has occurred in one of the port 3 alarm registers.
Port 2 Interrupt Indication: Enabled when a 1 is written into the P2MSK bit.
A 1 indicates that an alarm has occurred in one of the port 2 alarm registers.
Port 1 Interrupt Indication: Enabled when a 1 is written into the P1MSK bit.
A 1 indicates that an alarm has occurred in one of the port 1 alarm registers.
DATA SHEET
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Description
Description

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