TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 75

• Manufacturer Part Number: TXC-04251AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04251AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

PORT n - DESYNCHRONIZER CONTROL REGISTER DESCRIPTIONS
Address
D9 Port 4
A9 Port 3
Address
49 Port 1
79 Port 2
28
29
Bit
7-0
7-3
2
1
0
7-0
Bit
B3DH4E B Drop Bus Loss of H4 Indication - AU-3 C/STS-1 No. 3: Loss of multiframe
B2DH4E B Drop Bus Loss of H4 Indication - AU-3 B/STS-1 No. 2: Loss of multiframe
B1DH4E B Drop Bus Loss of H4 Indication - AU-3 A/STS-1 No. 1, AU-4 VC-4, or STS-
Symbol
Unused
Symbol
Pointer
Value
Leak
Rate
Same bit definitions as in register 29 hex, except the bits are latched.
Unused: These bits read out as 0.
for AUG-3 C/STS-1 No. 3 is declared if one or more H4 values differ from those
of a two-bit counter once per multiframe for two consecutive multiframes, when
control bit DV1SEL is 0. The received H4 multiframe sequence is 00, 01, 10, and
11. The multiframe detector will continue to operate in a free running mode, but
will lock to a new H4 sequence after one multiframe sequence has been
received correctly. This H4 detector is disabled when the format is an AU-4 VC-
4, or STS-1. This bit is forced to 1 at power-up.
for AUG-3 B/STS-1 No. 2 is declared if one or more H4 values differ from those
of a two-bit counter once per multiframe for two consecutive multiframes, when
control bit DV1SEL is 0. The received H4 multiframe sequence is 00, 01, 10, and
11. The multiframe detector will continue to operate in a free running mode, but
will lock to a new H4 sequence after one multiframe sequence has been
received correctly. This H4 detector is disabled when the format is an AU-4 VC-
4, or STS-1. This bit is forced to 1 at power-up.
1: Loss of multiframe for AUG-3 A/STS-1 No. 1 or AU-4 VC-4 is declared if one or
more H4 values differ from those of a two-bit counter once per multiframe for two
consecutive multiframes, when control bit DV1SEL is 0. The multiframe detector
will continue to operate in a free running mode, but will lock to a new H4
sequence after one multiframe sequence has been received correctly. This bit is
forced to 1 at power-up.
Desynchronizer Pointer Leak Rate Register - Port n: The count written
into this location is used for the internal leak rate buffer, and represents the
average leak rate. A count of 1 one represents 8 frames, or 2 multiframes, in
the rate of occurrence of pointer movements from the number of counts read
from the positive and negative stuff counters.
DATA SHEET
- 75 -
Description
Description
Ed. 4, March 2000
TXC-04251
TXC-04251-MB
QT1M