TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 65

• Manufacturer Part Number: TXC-04251AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04251AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

MEMORY MAP DESCRIPTIONS
COMMON CONTROL - PROVISIONING DESCRIPTIONS
Address
10
11
Bit
7
6
5
4
3
2
1
0
7
Symbol
BLOCK
AAHZE
BAHZE
SBTEN
MOD1
MOD0
NPIA
NPIB
NPIC
Format Selection: The format selection is made according to the table given
below.
MOD1
A Add Bus High Impedance Enable: A 1 forces the A-side add bus data
output to a high impedance state. Upon power-up, or on a hardware or
software reset, this bit is set to a 1. Note: For normal bus operation this bit
position must be written with a 0.
B Add Bus High Impedance Enable: A 1 forces the B-side add bus data
output to a high impedance state. Upon power-up, or on a hardware or
software reset, this bit is set to a 1. Note: For normal bus operation this bit
position must be written with a 0.
Block Count: A 1 enables two BIP-2 errors to be counted as a single error
(block) for the BIP-2 performance counters (V5 and Z7 bytes). A 0 enables
two BIP-2 errors to be counted as two errors.
Null Pointer Indicator Selection: A 1 enables a null pointer indicator to be
generated for one or more of the TUG-3s when control bit MOD1 and MOD0
are a 1 (STM-1 format). A null pointer indicator is carried in the first two bytes
of column 1 in a TUG-3. A null pointer indicator is defined as a 1001 in bits 1
through 4, bits 5 and 6 are equal to 0, five ones are in bits 7 through 11,
followed by five zeros in bits 12 through 16.
Software Bus Timing Enable: This bit works in conjunction with control bit
DRPBT and the ABUST pin according to the following table (where
X = Don’t Care):
SBTEN
This bit is reset to 0 upon power-up and a device reset.
0
0
1
1
0
0
1
1
MOD0
DRPBT
0
1
0
1
X
X
0
1
DATA SHEET
Format (and rate) Selected
- 65 -
ABUST
STS-1 Format
STS-3 Format
STM-1 AU-3 Format
STM-1 TUG-3/VC-4 Format
Low
High
X
X
Description
Add bus timing selected. Add bus data
derived from add bus timing signals. Soft-
ware control of bus timing disabled.
Drop bus timing selected. Add bus data
derived from like-named drop bus. Soft-
ware control of bus timing disabled.
Add bus timing selected. Add bus data
derived from add bus timing signals. Hard-
ware control of bus timing disabled.
Drop bus timing selected. Add bus data
derived from like-named drop bus. Hard-
ware control of bus timing disabled.
Action
Ed. 4, March 2000
TXC-04251
TXC-04251-MB
QT1M