TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 72
TXC-04251AIPQ
Manufacturer Part Number
TXC-04251AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-04251AIPQ.pdf
(94 pages)
Specifications of TXC-04251AIPQ
Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
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TXC-04251-MB
Ed. 4, March 2000
QT1M
TXC-04251
Address
21
7-6
Bit
5
4
3
2
1
0
Symbol
Unused
ASMSK
BSMSK
P4MSK
P3MSK
P2MSK
P1MSK
Unused: These bits must be written to 0.
A Side Interrupt Mask Bit: A 1 enables the A Side Interrupt Indication
(ASIDE).
B Side Interrupt Mask Bit: A 1 enables the B Side Interrupt Indication
(BSIDE).
Port 4 Interrupt Mask Bit: A 1 enables the Port 4 Interrupt Indication
(PORT4). It permits a hardware interrupt and a software interrupt indication
(INT) when an alarm has occurred in one of the alarm registers for port 4,
when the corresponding RPT4A, RPT4B, TFIFO4A, TFIFO4B, RFIFO4 or
TPORT4 mask bit is set.
Port 3 Interrupt Mask Bit: A 1 enables the Port 3 Interrupt Indication
(PORT3). It permits a hardware interrupt and a software interrupt indication
(INT) when an alarm has occurred in one of the alarm registers for port 3,
when the corresponding RPT3A, RPT3B, TFIFO3A, TFIFO3B, RFIFO3 or
TPORT3 mask bit is set.
Port 2 Interrupt Mask Bit: A 1 enables the Port 2 Interrupt Indication
(PORT2). It permits a hardware interrupt and a software interrupt indication
(INT) when an alarm has occurred in one of the alarm registers for port 2,
when the corresponding RPT2A, RPT2B, TFIFO2A, TFIFO2B, RFIFO2 or
TPORT2 mask bit is set.
Port 1 Interrupt Mask Bit: A 1 enables the Port 1 Interrupt Indication
(PORT1). It permits a hardware interrupt and a software interrupt indication
(INT) when an alarm has occurred in one of the alarm registers for port 1,
when the corresponding RPT1A, RPT1B, TFIFO1A, TFIFO1B, RFIFO1
TPORT1 mask bit is set.
DATA SHEET
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Description
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