TXC-04251AIPQ Transwitch Corporation, TXC-04251AIPQ Datasheet - Page 69

• Manufacturer Part Number: TXC-04251AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04251AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

COMMON REGISTERS - PROVISIONING DESCRIPTIONS
Address
Address
(cont.)
13
14
7-5
Bit
Bit
1
0
4
3
2
1
0
PTALTE Pointer Tracking AIS to LOP Transition Enabled: A 1 enables the AIS to
Symbol
TOBWZ
Symbol
UEAME
SE1AIS
V5AL10
Unused
HDWIE
UQAE
Unequipped Alarm AIS Enable: A common control for both the A and B
Drop buses. A 1 enables a receive T1 line AIS and an RDI to be transmitted
when an unequipped alarm is detected in either the A or B Drop bus signals.
Transmit Overhead Bytes With Zeros: A 0 enables bytes written into the
memory map by the microprocessor to be transmitted as the J2, Z6, and
overhead communications channel bytes for all four ports. A 1 forces the J2,
Z6, and overhead communications channel bytes, and the unused bits (bits
1, 2, 3, 4 and 8) in the Z7 byte, to be transmitted as zeros for all four ports.
Unused: These bits must be written to 0.
Unequipped Active Multiplex Line Enable: A 0 enables an unequipped
channel or an unequipped supervisory channel to be generated on the
inactive bus in Multiplexed Mode only, according to the table given below:
Drop
A 1 enables an unequipped channel or unequipped supervisory channel to
be transmitted only on the active bus for the VT/TU selected.
All other modes (Unidirectional Ring Mode, and Bidirectional Ring Mode)
always transmit an unequipped channel or an unequipped supervisory
channel on the active bus only.
See control bits UCHnE and USCHnE below (Addresses 4A, 7A, AA, and
DA) for associated control functions.
Select E1AIS: A 1 disables the TOH H1/H2n AIS detection circuit and
enables the AIS detection circuit for the TOH E1n bytes. A 0 enables the AIS
detection circuit for the H1/H2n bytes. The n represents the STS-1 signal the
VT is being carried in.
V5 Alarm Detection Select 10: A 1 selects 10 consecutive RDI assertions
for detection and recovery. A 0 selects 5 consecutive RDI assertions for
detection and recovery.
LOP transition in the pointer tracking state machine, as required per ETSI
standards. A 0 will disable the transition per Bellcore and ANSI standards.
Hardware Interrupt Enable: A 1 enables the interrupt pin to be activated
when an interrupt occurs, provided the corresponding mask bit is set.
A
B
Add
B
A
Unequipped or unequipped supervisory channel can be
transmitted for the VT/TU selected on the A bus.
Unequipped or unequipped supervisory channel can be
transmitted for the VT/TU selected on the B bus.
Action
DATA SHEET
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Description
Description
Ed. 4, March 2000
TXC-04251
TXC-04251-MB
QT1M