ADSP-BF561SKBCZ600 Analog Devices Inc, ADSP-BF561SKBCZ600 Datasheet - Page 21

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ADSP-BF561SKBCZ600

Manufacturer Part Number
ADSP-BF561SKBCZ600
Description
DSP Fixed-Point 16-Bit 600MHz 600MIPS 256-Pin CSP-BGA
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADSP-BF561SKBCZ600

Package
256CSP-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
600 MHz
Ram Size
32 KB
Device Million Instructions Per Second
600 MIPS
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
1
2
ESD SENSITIVITY
Internal (Core) Supply Voltage
External (I/O) Supply Voltage
Input Voltage
Output Voltage Swing
Load Capacitance
Core Clock (CCLK)
System Clock (SCLK)
Storage Temperature Range
Junction Temperature Under Bias
Lead Temperature (5 seconds)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADSP-BF561 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precau-
tions are recommended to avoid performance degradation or loss of functionality.
Stresses greater than those listed above may cause permanent damage to the device.
For proper SDRAM controller operation, the maximum load capacitance is 50 pF (at
These are stress ratings only. Functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
3.3V) or 30 pF (at 2.5V) for ADDR25-2, DATA31-0, ABE3-0/SDQM3-0, CLKOUT,
SCKE, SA10, SRAS, SCAS, SWE, and SMS.
ADSP-BF561SKBCZ600
ADSP-BF561SKBCZ500
1
1 ,2
1
1
1
1
1
1
(V
1
(V
DDEXT
DDINT
)
)
–0.3 V to +1.4 V
–0.3 V to +3.8 V
–0.5 V to 3.6 V
–0.5 V to V
200 pF
600 MHz
500 MHz
133 MHz
–65ºC to +150ºC
125ºC
185ºC
Rev. PrC | Page 21 of 52 | April 2004
DDEXT
+0.5 V
ADSP-BF561

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