ADSP-BF561SKBCZ600 Analog Devices Inc, ADSP-BF561SKBCZ600 Datasheet - Page 36

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ADSP-BF561SKBCZ600

Manufacturer Part Number
ADSP-BF561SKBCZ600
Description
DSP Fixed-Point 16-Bit 600MHz 600MIPS 256-Pin CSP-BGA
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADSP-BF561SKBCZ600

Package
256CSP-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
600 MHz
Ram Size
32 KB
Device Million Instructions Per Second
600 MIPS
ADSP-BF561
Serial Peripheral Interface (SPI) Port—Slave Timing
Table 26
Table 26. Serial Peripheral Interface (SPI) Port—Slave Timing
Parameter
Timing Requirements
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
t
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
DSOE
DSDHI
DDSPID
HDSPID
HSPID
and
Figure 17
Serial clock high period
Serial clock low period
Serial clock period
Last SCK edge to SPISS not asserted
Sequential Transfer Delay
SPISS assertion to first SCK edge
Data input valid to SCK edge (data input setup)
SCK sampling edge to data input invalid
SPISS assertion to data out active
SPISS deassertion to data high impedance
SCK edge to data out valid (data out delay)
SCK edge to data out invalid (data out hold)
describe SPI port slave operations.
Rev. PrC | Page 36 of 52 | April 2004
Preliminary Technical Data
Min
2t
2t
4t
2t
2t
2t
1.6
1.6
0
0
0
0
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
-1.5
-1.5
-1.5
-1.5
-1.5
-1.5
Max
8
8
10
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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