ADSP-BF561SKBCZ600 Analog Devices Inc, ADSP-BF561SKBCZ600 Datasheet - Page 42

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ADSP-BF561SKBCZ600

Manufacturer Part Number
ADSP-BF561SKBCZ600
Description
DSP Fixed-Point 16-Bit 600MHz 600MIPS 256-Pin CSP-BGA
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADSP-BF561SKBCZ600

Package
256CSP-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
600 MHz
Ram Size
32 KB
Device Million Instructions Per Second
600 MIPS
ADSP-BF561
POWER DISSIPATION
Total power dissipation has two components, one due to inter-
nal circuitry (P
output drivers (P
internal circuitry (V
dent on the instruction execution sequence and the data
operands involved.
Table 30. Internal Power Dissipation
1
2
3
4
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
ing Specifications on Page
time, output enable time, and capacitive loading. The timing
specifications for the DSP apply for the voltage reference levels
Parameter f
I
I
I
3
I
BERNATE
I
Processor executing 75% dual Mac, 25% ADD with moderate data bus
See the ADSP-BF53x Blackfin Processor Hardware Reference Manual for
Measured at V
DDTYP
DDSLEEP
DDDEEPSLEEP
DDHI-
DD
activity.
definitions of Sleep and Deep Sleep operating modes.
• The number of output pins that switch during each cycle
• The maximum frequency at which they can switch (f)
• Their load capacitance (C)
• Their voltage swing (V
data is specified for typical process parameters. All data at 25ºC.
(O)
2
4
3
Test Conditions
50 MHz
V
0.8 V
TBD
TBD
TBD
TBD
DDEXT
CCLK
DDINT
INT
EXT
= 3.65V with voltage regulator off (V
=
) and one due to the switching of external
).
=
DDINT
Table 30
f
400 MHz
V
1.2 V
TBD
TBD
TBD
TBD
CCLK
DDINT
). Internal power dissipation is depen-
22. These include output disable
DDEXT
=
1
=
shows the power dissipation for
f
600 MHz
V
1.2 V
520
TBD
70
TBD
CCLK
)
DDINT
=
=
f
600 MHz
V
1.35 V
TBD
TBD
TBD
TBD
CCLK
DDINT
DDINT
=
=
Rev. PrC | Page 42 of 52 | April 2004
= 0V).
Unit
mA
mA
mA
A
Tim-
The external component is calculated using:
The frequency f includes driving the load high and then back
low. For example: DATA15–0 pins can drive high and low at a
maximum rate of 1/(23t
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation.
Note that the conditions causing a worst-case P
those causing a worst-case P
while 100% of the output pins are switching from all ones (1s) to
all zeros (0s). Note also that it is not common for an application
to have 100%,or even 50%, of the outputs switching
simultaneously.
OUTPUT DRIVE CURRENTS
Figure 22
ers of the ADSP-BF561. The curves represent the current drive
capability of the output drivers as a function of output voltage.
in
Figure 23. Voltage Reference Levels for AC Measurements (Except Output
Figure
-100
-120
120
100
-20
-40
-60
-80
OUTPUT
80
60
40
20
INPUT
0
23.
shows typical I-V characteristics for the output driv-
OR
0
P
Figure 22. ADSP-BF561 Typical Drive
1.5V
0.5
Preliminary Technical Data
Total
P
EXT
SOURCE (VDDEXT) VOLTAGE - V
=
SCLK
1
P
Enable/Disable)
=
EXT
INT
) while in SDRAM burst mode.
O
+
1.5
. Maximum P
×
(
I
C
DD
×
×
2
V
V
2
DD
DDINT
×
2.5
INT
f
)
EXT
cannot occur
3
differ from
1.5V
3.5

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