PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 109

• Manufacturer Part Number: PEB20256E-V21
• Description: IC CONTROLLER INTERFACE 388-BGA
• Manufacturer: Infineon Technologies

Specifications of PEB20256E-V21

• Function: Multichannel Network Interface Controller (MUNICH)
• Interface: HDLC, PPP, Serial, TMA
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 200mA
• Power (watts): 3W
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 388-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Circuits: -
• Other names: PEB20256E-V21; PEB20256E-V21IN

synchronization input TSP(x) and the transmit clock input TCLK(x). In channelized mode
(T1, E1, 4.096 MHz and 8.192 MHz) the high level after a low to high transition of the
frame synchronization pulse marks the last bit of a frame (default value in transmit
direction) respectively the first bit of a frame (default value in receive direction). The
active edge of the frame synchronization pulse can be shifted in a range of -4 to +3.
RD(x), RSP(x) and TSP(x) can be sampled on the rising or falling edge of the receive
clock respectively the transmit clock. Outgoing data is updated on the rising or falling
edge of TCLK(x).
•
Figure 5-10
Data Sheet
TCLK(x)
RCLK(x)
T1 frame
T1 frame
Transmit
Bit Shift
Bit Shift
RSP(x)
Receive
TSP(x)
RD(x)
TD(x)
1. TSP(x) sampled with the rising edge of TCLK(x), TD(x) updated with the falling edge of TCLK(x).
2. In given example transmit bit shift is set to zero.
3. RSP(x) sampled with the rising edge of RCLK(x), RD(x) sampled with the rising edge of RCLK(x).
4. In given example receive bit shift is set to one.
1
3
1
3
2
4
1
3
T1 Mode Frame Timing
B3
B3
3
3
B4
B4
4
3
4
B5
B5
5
2
5
3
B6
B6
6
1
6
2
B7
B7
7
0
7
1
-1
F
F
0
109
B0
-2
-1
0
B0
0
B1
-3
-2
B1
1
1
B2
-4
-3
B2
2
2
Timeslot 0
Timeslot 0
B3
-4
3
B3
3
B4
4
B4
4
Interface Description
B5
B5
5
5
B6
B6
6
6
PEB 20256 E
PEF 20256 E
B7
7
B7
7
B0
B0
0
0
04.2001
B1
1
1