PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 154
![IC CONTROLLER INTERFACE 388-BGA](/photos/6/98/69826/peb20256e-v21_sml.jpg)
PEB20256E-V21
Manufacturer Part Number
PEB20256E-V21
Description
IC CONTROLLER INTERFACE 388-BGA
Manufacturer
Infineon Technologies
Datasheet
1.PEB20256E-V21.pdf
(232 pages)
Specifications of PEB20256E-V21
Function
Multichannel Network Interface Controller (MUNICH)
Interface
HDLC, PPP, Serial, TMA
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
200mA
Power (watts)
3W
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
388-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Circuits
-
Other names
PEB20256E-V21
PEB20256E-V21IN
PEB20256E-V21IN
Available stocks
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Price
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Part Number:
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Manufacturer:
MAX
Quantity:
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Part Number:
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Manufacturer:
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CSPEC_BUFFER
Channel Specification Buffer Configuration Register
Access
Address
Reset Value
TQUEUE
ITBS
TBRTC
Data Sheet
31
15
TQUEUE(2:0)
TBFTC(3:0)
29
: read/write
: 020
: 00200000
Transmit Interrupt Vector Queue
This bit field determines the interrupt queue where channel interrupts
transmit will be stored.
Individual transmit buffer size
Note: Please note that the internal architecture is 32 bit wide. Therefore
The transmit buffer size configures the number of internal transmit buffer
Note: The sum of transmit forward threshold and transmit refill
Transmit Buffer Refill Threshold Code
Note: Please note that the internal architecture is 32 bit wide. Therefore
TBRTC is a coding for the transmit refill threshold. Please refer to Table
8-4 for correspondence between code and threshold.
The internal transmit buffer has a programmable number of buffer
locations per channel. When the number of free locations reaches the
transmit buffer refill threshold the internal transmit buffer requests new
data from the data management unit.
28
12
H
locations for a particular channel. Buffer locations will be
allocated on command transmit init and released after command
transmit off.
each buffer location corresponds to four data octets.
threshold must be smaller than the internal buffer size.
each buffer location corresponds to four data octets.
11
H
TBRTC(3:0)
8
154
0
ITBS(12:0)
6
RQUEUE(2:0)
4
Register Description
3
RBTC(3:0)
PEB 20256 E
PEF 20256 E
04.2001
16
0
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