PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 32

IC CONTROLLER INTERFACE 388-BGA

PEB20256E-V21

Manufacturer Part Number
PEB20256E-V21
Description
IC CONTROLLER INTERFACE 388-BGA
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20256E-V21

Function
Multichannel Network Interface Controller (MUNICH)
Interface
HDLC, PPP, Serial, TMA
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
200mA
Power (watts)
3W
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
388-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Circuits
-
Other names
PEB20256E-V21
PEB20256E-V21IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB20256E-V21
Manufacturer:
MAX
Quantity:
63
Part Number:
PEB20256E-V21
Manufacturer:
Infineon Technologies
Quantity:
10 000
Data Sheet
AE4
AC7
AE5
T2
Pin No.
DEVSEL
PERR
SERR
REQ
Symbol
Output (O)
Input (I)
s/t/s
s/t/s
o/d
t/s
32
Device Select
When activated by a slave, it indicates to
the current bus master that the slave has
decoded its address as the target of the
current transaction. If no bus slave
activates DEVSEL within six bus CLK
cycles, the master should abort the
transaction.
When the MUNICH256 is bus master,
DEVSEL is input. If DEVSEL is not
activated within six clock cycles after an
address is output on AD(31:0), the
MUNICH256 aborts the transaction.
When the MUNICH256 is bus slave,
DEVSEL is output. DEVSEL is tri-stated,
when the MUNICH256 is not involved in
the current transaction.
Parity Error
When activated, indicates a parity error
over the AD(31:0) and C/BE(3:0) signals
(compared to the PAR input). It has a
delay of two CLK cycles with respect to
AD and C/BE(3:0) (i.e., it is valid for the
cycle
corresponding PAR cycle).
PERR is asserted relative to the rising
edge of CLK.
System Error
The MUNICH256 asserts this signal to
indicate an address parity error and report
a fatal system error.
SERR is an open drain output activated
on the rising edge of CLK.
Request
Used by the MUNICH256 to request
control of the PCI bus. It is tri-state during
reset.
REQ is activated on the rising edge of
CLK.
immediately
Function
following
Pin Description
PEB 20256 E
PEF 20256 E
04.2001
the

Related parts for PEB20256E-V21